From patchwork Thu Oct 13 18:04:19 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dhinakaran Pandiyan X-Patchwork-Id: 9375595 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 18D036075E for ; Thu, 13 Oct 2016 18:04:57 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0A3712A172 for ; Thu, 13 Oct 2016 18:04:57 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id F09292A181; Thu, 13 Oct 2016 18:04:56 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 71A2B2A172 for ; Thu, 13 Oct 2016 18:04:56 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 5EDA16EB17; Thu, 13 Oct 2016 18:04:53 +0000 (UTC) X-Original-To: intel-gfx@freedesktop.org Delivered-To: intel-gfx@freedesktop.org Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTPS id 9AC786EB17 for ; Thu, 13 Oct 2016 18:04:51 +0000 (UTC) Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga102.fm.intel.com with ESMTP; 13 Oct 2016 11:04:44 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.31,340,1473145200"; d="scan'208";a="772286223" Received: from nuc-skylake.jf.intel.com ([10.54.75.14]) by FMSMGA003.fm.intel.com with ESMTP; 13 Oct 2016 11:04:43 -0700 From: Dhinakaran Pandiyan To: intel-gfx@freedesktop.org Date: Thu, 13 Oct 2016 11:04:19 -0700 Message-Id: <1476381859-4614-1-git-send-email-dhinakaran.pandiyan@intel.com> X-Mailer: git-send-email 2.7.4 Cc: Jani Nikula , Jeeja KP , Libin Yang , Dhinakaran Pandiyan Subject: [Intel-gfx] [PATCH] drm/i915/dp: Increase cdclk when DP audio is enabled with 4 lanes and HBR2 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP According to BSpec, cdclk has to be not less than 432 MHz with DP audio enabled, port width x4, and link rate HBR2 (5.4 GHz) Having a lower cdclk triggers pipe underruns, which then lead to displays continuously cycling off and on. This is essential for DP MST audio as the link is trained at HBR2 and 4 lanes by default. This should fix https://bugs.freedesktop.org/show_bug.cgi?id=97907 Signed-off-by: Dhinakaran Pandiyan Tested-by: Libin Yang --- drivers/gpu/drm/i915/intel_display.c | 47 +++++++++++++++++++++++++++++++++--- 1 file changed, 43 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index cfcb03f..6a05183 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -6603,14 +6603,43 @@ static int valleyview_modeset_calc_cdclk(struct drm_atomic_state *state) return 0; } +static bool cdclk_min_for_dp_audio(struct drm_atomic_state *state) +{ + + struct drm_crtc_state *crtc_state; + struct drm_crtc *crtc; + int i; + + /* BSpec says "Do not use DisplayPort with CDCLK less than 432 MHz, + * audio enabled, port width x4, and link rate HBR2 (5.4 GHz), or else + * there may be audio corruption or screen corruption." + */ + + for_each_crtc_in_state(state, crtc, crtc_state, i) { + struct intel_crtc_state *pipe_config = + to_intel_crtc_state(crtc_state); + + return (intel_crtc_has_dp_encoder(pipe_config) && + pipe_config->has_audio && + pipe_config->port_clock == 540000 && + pipe_config->lane_count == 4); + } + + return false; +} + static int bxt_modeset_calc_cdclk(struct drm_atomic_state *state) { int max_pixclk = ilk_max_pixel_rate(state); + int cdclk, min_cdclk = 0; struct intel_atomic_state *intel_state = to_intel_atomic_state(state); - intel_state->cdclk = intel_state->dev_cdclk = - bxt_calc_cdclk(max_pixclk); + if (cdclk_min_for_dp_audio(state)) + min_cdclk = bxt_calc_cdclk(432000); + + cdclk = bxt_calc_cdclk(max_pixclk); + intel_state->cdclk = intel_state->dev_cdclk = max(min_cdclk, cdclk); if (!intel_state->active_crtcs) intel_state->dev_cdclk = bxt_calc_cdclk(0); @@ -10374,7 +10403,10 @@ static int broadwell_modeset_calc_cdclk(struct drm_atomic_state *state) struct drm_i915_private *dev_priv = to_i915(state->dev); struct intel_atomic_state *intel_state = to_intel_atomic_state(state); int max_pixclk = ilk_max_pixel_rate(state); - int cdclk; + int cdclk, min_cdclk = 0; + + if (cdclk_min_for_dp_audio(state)) + min_cdclk = broadwell_calc_cdclk(432000); /* * FIXME should also account for plane ratio @@ -10382,6 +10414,8 @@ static int broadwell_modeset_calc_cdclk(struct drm_atomic_state *state) */ cdclk = broadwell_calc_cdclk(max_pixclk); + cdclk = max(min_cdclk, cdclk); + if (cdclk > dev_priv->max_cdclk_freq) { DRM_DEBUG_KMS("requested cdclk (%d kHz) exceeds max (%d kHz)\n", cdclk, dev_priv->max_cdclk_freq); @@ -10411,7 +10445,10 @@ static int skl_modeset_calc_cdclk(struct drm_atomic_state *state) struct drm_i915_private *dev_priv = to_i915(state->dev); const int max_pixclk = ilk_max_pixel_rate(state); int vco = intel_state->cdclk_pll_vco; - int cdclk; + int cdclk, min_cdclk = 0; + + if (cdclk_min_for_dp_audio(state)) + min_cdclk = skl_calc_cdclk(432000, vco); /* * FIXME should also account for plane ratio @@ -10419,6 +10456,8 @@ static int skl_modeset_calc_cdclk(struct drm_atomic_state *state) */ cdclk = skl_calc_cdclk(max_pixclk, vco); + cdclk = max(min_cdclk, cdclk); + /* * FIXME move the cdclk caclulation to * compute_config() so we can fail gracegully.