From patchwork Sat Oct 29 01:07:25 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Navare, Manasi" X-Patchwork-Id: 9402967 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 5B3446022E for ; Sat, 29 Oct 2016 01:06:09 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 488992A6C9 for ; Sat, 29 Oct 2016 01:06:09 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 3DA6F2A6F5; Sat, 29 Oct 2016 01:06:09 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 45DE12A6C9 for ; Sat, 29 Oct 2016 01:06:08 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B1B9C6ECA1; Sat, 29 Oct 2016 01:06:07 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by gabe.freedesktop.org (Postfix) with ESMTPS id 7370E6EC97 for ; Sat, 29 Oct 2016 01:06:02 +0000 (UTC) Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga104.fm.intel.com with ESMTP; 28 Oct 2016 18:06:01 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos; i="5.31,560,1473145200"; d="scan'208"; a="1051968317" Received: from manasi-otcmedia.jf.intel.com ([10.7.199.175]) by orsmga001.jf.intel.com with ESMTP; 28 Oct 2016 18:06:01 -0700 From: Manasi Navare To: intel-gfx@lists.freedesktop.org Date: Fri, 28 Oct 2016 18:07:25 -0700 Message-Id: <1477703245-27375-5-git-send-email-manasi.d.navare@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1477703245-27375-1-git-send-email-manasi.d.navare@intel.com> References: <1477703245-27375-1-git-send-email-manasi.d.navare@intel.com> Cc: Daniel Vetter Subject: [Intel-gfx] [PATCH v2 4/4] drm/i915: Implement Link Rate fallback on Link training failure X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP If link training at a link rate optimal for a particular mode fails during modeset's atomic commit phase, then we let the modeset complete and then retry. We save the link rate value at which link training failed, update the link status property to "BAD" and use a lower link rate to prune the modes. It will redo the modeset on the current mode at lower link rate or if the current mode gets pruned due to lower link constraints then, it will send a hotplug uevent for userspace to handle it. This is also required to pass DP CTS tests 4.3.1.3, 4.3.1.4, 4.3.1.6. v2: * Squashed a few patches (Jani Nikula) Cc: Jani Nikula Cc: Daniel Vetter Cc: Ville Syrjala Signed-off-by: Manasi Navare --- drivers/gpu/drm/drm_atomic_helper.c | 4 ++ drivers/gpu/drm/i915/intel_ddi.c | 23 ++++++++- drivers/gpu/drm/i915/intel_dp.c | 74 +++++++++++++++++++++++++-- drivers/gpu/drm/i915/intel_dp_link_training.c | 12 +++-- drivers/gpu/drm/i915/intel_drv.h | 5 +- 5 files changed, 110 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/drm_atomic_helper.c b/drivers/gpu/drm/drm_atomic_helper.c index 75ad01d..a3df3a4 100644 --- a/drivers/gpu/drm/drm_atomic_helper.c +++ b/drivers/gpu/drm/drm_atomic_helper.c @@ -519,6 +519,10 @@ static int handle_conflicting_encoders(struct drm_atomic_state *state, connector_state); if (ret) return ret; + + crtc_state = drm_atomic_get_existing_crtc_state(state, connector->state->crtc); + if (connector->link_status == DRM_MODE_LINK_STATUS_BAD) + crtc_state->connectors_changed = true; } /* diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c index 938ac4d..319eeca 100644 --- a/drivers/gpu/drm/i915/intel_ddi.c +++ b/drivers/gpu/drm/i915/intel_ddi.c @@ -1684,6 +1684,8 @@ static void intel_ddi_pre_enable_dp(struct intel_encoder *encoder, struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); enum port port = intel_ddi_get_encoder_port(encoder); + struct intel_connector *intel_connector = intel_dp->attached_connector; + struct drm_connector *connector = &intel_connector->base; intel_dp_set_link_params(intel_dp, link_rate, lane_count, link_mst); @@ -1694,7 +1696,26 @@ static void intel_ddi_pre_enable_dp(struct intel_encoder *encoder, intel_prepare_dp_ddi_buffers(encoder); intel_ddi_init_dp_buf_reg(encoder); intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON); - intel_dp_start_link_train(intel_dp); + if (!intel_dp_start_link_train(intel_dp)) { + DRM_DEBUG_KMS("Link Training failed at link rate = %d, lane count = %d", + link_rate, lane_count); + intel_dp->link_train_failed = true; + intel_dp_get_link_train_fallback_values(intel_dp, link_rate, + lane_count); + /* Schedule a Hotplug Uevent to userspace to start modeset */ + schedule_work(&intel_connector->modeset_retry_work); + } else { + DRM_DEBUG_KMS("Link Training Passed at Link Rate = %d, Lane count = %d", + link_rate, lane_count); + intel_dp->link_train_failed = false; + intel_dp->fallback_link_rate_index = -1; + intel_dp->fallback_link_rate = 0; + intel_dp->fallback_lane_count = 0; + connector->link_status = DRM_MODE_LINK_STATUS_GOOD; + intel_dp_set_link_status_property(connector, + DRM_MODE_LINK_STATUS_GOOD); + } + if (port != PORT_A || INTEL_GEN(dev_priv) >= 9) intel_dp_stop_link_train(intel_dp); } diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index fb4fcdd..d1f0e2c 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -354,8 +354,14 @@ void intel_dp_get_link_train_fallback_values(struct intel_dp *intel_dp, target_clock = fixed_mode->clock; } - max_link_clock = intel_dp_max_link_rate(intel_dp); - max_lanes = intel_dp_max_lane_count(intel_dp); + /* Prune the modes using the fallback link rate/lane count */ + if (intel_dp->link_train_failed) { + max_link_clock = intel_dp->fallback_link_rate; + max_lanes = intel_dp->fallback_lane_count; + } else { + max_link_clock = intel_dp_max_link_rate(intel_dp); + max_lanes = intel_dp_max_lane_count(intel_dp); + } max_rate = intel_dp_max_data_rate(max_link_clock, max_lanes); mode_rate = intel_dp_link_required(target_clock, 18); @@ -1640,6 +1646,12 @@ static int intel_dp_compute_bpp(struct intel_dp *intel_dp, if (adjusted_mode->flags & DRM_MODE_FLAG_DBLCLK) return false; + /* Fall back to lower link rate in case of failure in previous modeset */ + if (intel_dp->link_train_failed) { + min_lane_count = max_lane_count = intel_dp->fallback_lane_count; + min_clock = max_clock = intel_dp->fallback_link_rate_index; + } + DRM_DEBUG_KMS("DP link computation with max lane count %i " "max bw %d pixel clock %iKHz\n", max_lane_count, common_rates[max_clock], @@ -4423,6 +4435,13 @@ static bool intel_digital_port_connected(struct drm_i915_private *dev_priv, intel_dp->compliance_test_active = 0; intel_dp->compliance_test_type = 0; intel_dp->compliance_test_data = 0; + intel_dp->link_train_failed = false; + intel_dp->fallback_link_rate_index = -1; + intel_dp->fallback_link_rate = 0; + intel_dp->fallback_lane_count = 0; + connector->link_status = DRM_MODE_LINK_STATUS_GOOD; + intel_dp_set_link_status_property(connector, + DRM_MODE_LINK_STATUS_GOOD); if (intel_dp->is_mst) { DRM_DEBUG_KMS("MST device may have disappeared %d vs %d\n", @@ -4514,8 +4533,12 @@ static bool intel_digital_port_connected(struct drm_i915_private *dev_priv, DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n", connector->base.id, connector->name); + /* If this is a retry due to link trianing failure */ + if (status == connector_status_connected && intel_dp->link_train_failed) + return status; + /* If full detect is not performed yet, do a full detect */ - if (!intel_dp->detect_done) + if (!intel_dp->detect_done && !intel_dp->link_train_failed) status = intel_dp_long_pulse(intel_dp->attached_connector); intel_dp->detect_done = false; @@ -5692,6 +5715,47 @@ static bool intel_edp_init_connector(struct intel_dp *intel_dp, return false; } +static void intel_dp_modeset_retry_work_fn(struct work_struct *work) +{ + struct intel_connector *intel_connector; + struct drm_connector *connector; + struct drm_display_mode *mode; + bool verbose_prune = true; + bool reprobe = false; + + intel_connector = container_of(work, typeof(*intel_connector), + modeset_retry_work); + connector = &intel_connector->base; + + /* Grab the locks before changing connector property*/ + mutex_lock(&connector->dev->mode_config.mutex); + DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n", connector->base.id, + connector->name); + list_for_each_entry(mode, &connector->modes, head) { + mode->status = intel_dp_mode_valid(connector, + mode); + if (mode->status != MODE_OK) + reprobe = true; + } + drm_mode_prune_invalid(connector->dev, &connector->modes, + verbose_prune); + + /* Set connector link status to BAD only if modeset required + * for the current mode, if mode list changed then just send uevent + * so that it can reprobe the connectors and validate modes and do + * a modeset on a different valid mode. + */ + if (!reprobe) { + connector->link_status = DRM_MODE_LINK_STATUS_BAD; + intel_dp_set_link_status_property(connector, + DRM_MODE_LINK_STATUS_BAD); + } + mutex_unlock(&connector->dev->mode_config.mutex); + + /* Send Hotplug uevent so userspace can reprobe */ + drm_kms_helper_hotplug_event(connector->dev); +} + bool intel_dp_init_connector(struct intel_digital_port *intel_dig_port, struct intel_connector *intel_connector) @@ -5704,6 +5768,10 @@ static bool intel_edp_init_connector(struct intel_dp *intel_dp, enum port port = intel_dig_port->port; int type; + /* Initialize the work for modeset in case of link train failure */ + INIT_WORK(&intel_connector->modeset_retry_work, + intel_dp_modeset_retry_work_fn); + if (WARN(intel_dig_port->max_lanes < 1, "Not enough lanes (%d) for DP on port %c\n", intel_dig_port->max_lanes, port_name(port))) diff --git a/drivers/gpu/drm/i915/intel_dp_link_training.c b/drivers/gpu/drm/i915/intel_dp_link_training.c index 0048b52..10f81ab 100644 --- a/drivers/gpu/drm/i915/intel_dp_link_training.c +++ b/drivers/gpu/drm/i915/intel_dp_link_training.c @@ -310,9 +310,15 @@ void intel_dp_stop_link_train(struct intel_dp *intel_dp) DP_TRAINING_PATTERN_DISABLE); } -void +bool intel_dp_start_link_train(struct intel_dp *intel_dp) { - intel_dp_link_training_clock_recovery(intel_dp); - intel_dp_link_training_channel_equalization(intel_dp); + bool ret; + + if (intel_dp_link_training_clock_recovery(intel_dp)) { + ret = intel_dp_link_training_channel_equalization(intel_dp); + if (ret) + return true; + } + return false; } diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index bc25b2b..a54e9b7 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -312,6 +312,9 @@ struct intel_connector { void *port; /* store this opaque as its illegal to dereference it */ struct intel_dp *mst_port; + + /* Work struct to schedule a uevent on link train failure */ + struct work_struct modeset_retry_work; }; struct dpll { @@ -1402,7 +1405,7 @@ void intel_dp_set_link_params(struct intel_dp *intel_dp, bool link_mst); void intel_dp_get_link_train_fallback_values(struct intel_dp *intel_dp, int link_rate, uint8_t lane_count); -void intel_dp_start_link_train(struct intel_dp *intel_dp); +bool intel_dp_start_link_train(struct intel_dp *intel_dp); void intel_dp_stop_link_train(struct intel_dp *intel_dp); void intel_dp_sink_dpms(struct intel_dp *intel_dp, int mode); void intel_dp_encoder_reset(struct drm_encoder *encoder);