From patchwork Fri Nov 4 09:30:40 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: sourab.gupta@intel.com X-Patchwork-Id: 9412149 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id A817260722 for ; Fri, 4 Nov 2016 09:29:36 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A90142A336 for ; Fri, 4 Nov 2016 09:29:36 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 9DCCD2ADD6; Fri, 4 Nov 2016 09:29:36 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 2BF9C2A336 for ; Fri, 4 Nov 2016 09:29:36 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 92F066E8EA; Fri, 4 Nov 2016 09:29:35 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by gabe.freedesktop.org (Postfix) with ESMTPS id 2659C6E908 for ; Fri, 4 Nov 2016 09:29:34 +0000 (UTC) Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga103.jf.intel.com with ESMTP; 04 Nov 2016 02:29:34 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.31,442,1473145200"; d="scan'208";a="187548436" Received: from sourab-desktop.iind.intel.com ([10.223.82.156]) by fmsmga004.fm.intel.com with ESMTP; 04 Nov 2016 02:29:30 -0700 From: sourab.gupta@intel.com To: intel-gfx@lists.freedesktop.org Date: Fri, 4 Nov 2016 15:00:40 +0530 Message-Id: <1478251844-23509-12-git-send-email-sourab.gupta@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1478251844-23509-1-git-send-email-sourab.gupta@intel.com> References: <1478251844-23509-1-git-send-email-sourab.gupta@intel.com> Cc: "Christopher S . Hall" , Daniel Vetter , Sourab Gupta , Matthew Auld , Thomas Gleixner Subject: [Intel-gfx] [PATCH 11/15] drm/i915: Support opening multiple concurrent perf streams X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP From: Sourab Gupta This patch adds support for opening multiple concurrent perf streams for different gpu engines, while having the restriction to open only a single stream open for a particular gpu engine. This enables userspace client to open multiple streams, one per engine, at any time to capture sample data for multiple gpu engines. Signed-off-by: Sourab Gupta --- drivers/gpu/drm/i915/i915_drv.h | 2 +- drivers/gpu/drm/i915/i915_perf.c | 69 ++++++++++++++++++++++------------------ 2 files changed, 39 insertions(+), 32 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 119c82b..e912679 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -2204,7 +2204,7 @@ struct drm_i915_private { struct hrtimer poll_check_timer; - struct i915_perf_stream *exclusive_stream; + struct i915_perf_stream *ring_stream[I915_NUM_ENGINES]; wait_queue_head_t poll_wq[I915_NUM_ENGINES]; atomic_t pollin[I915_NUM_ENGINES]; diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c index b05c41a..8eb80e8 100644 --- a/drivers/gpu/drm/i915/i915_perf.c +++ b/drivers/gpu/drm/i915/i915_perf.c @@ -1086,7 +1086,7 @@ static int gen8_append_oa_reports(struct i915_perf_stream *stream, * an invalid ID. It could be good to annotate these * reports with a _CTX_SWITCH_AWAY reason later. */ - if (!dev_priv->perf.exclusive_stream->ctx || + if (!stream->ctx || dev_priv->perf.oa.specific_ctx_id == ctx_id || dev_priv->perf.oa.oa_buffer.last_ctx_id == ctx_id) { @@ -1097,7 +1097,7 @@ static int gen8_append_oa_reports(struct i915_perf_stream *stream, * the switch-away reports with an invalid * context id to be recognisable by userspace. */ - if (dev_priv->perf.exclusive_stream->ctx && + if (stream->ctx && dev_priv->perf.oa.specific_ctx_id != ctx_id) report32[2] = 0xffffffff; @@ -1763,7 +1763,7 @@ static void i915_ring_stream_destroy(struct i915_perf_stream *stream) { struct drm_i915_private *dev_priv = stream->dev_priv; - BUG_ON(stream != dev_priv->perf.exclusive_stream); + BUG_ON(stream != dev_priv->perf.ring_stream[stream->engine]); if (stream->using_oa) { dev_priv->perf.oa.ops.disable_metric_set(dev_priv); @@ -1777,7 +1777,7 @@ static void i915_ring_stream_destroy(struct i915_perf_stream *stream) if (stream->cs_mode) free_command_stream_buf(dev_priv, stream->engine); - dev_priv->perf.exclusive_stream = NULL; + dev_priv->perf.ring_stream[stream->engine] = NULL; } static void gen7_init_oa_buffer(struct drm_i915_private *dev_priv) @@ -2220,14 +2220,14 @@ static void gen7_update_oacontrol_locked(struct drm_i915_private *dev_priv) { assert_spin_locked(&dev_priv->perf.hook_lock); - if (dev_priv->perf.exclusive_stream->state != + if (dev_priv->perf.ring_stream[RCS]->state != I915_PERF_STREAM_DISABLED) { unsigned long ctx_id = 0; - if (dev_priv->perf.exclusive_stream->ctx) + if (dev_priv->perf.ring_stream[RCS]->ctx) ctx_id = dev_priv->perf.oa.specific_ctx_id; - if (dev_priv->perf.exclusive_stream->ctx == NULL || ctx_id) { + if (dev_priv->perf.ring_stream[RCS]->ctx == NULL || ctx_id) { bool periodic = dev_priv->perf.oa.periodic; u32 period_exponent = dev_priv->perf.oa.period_exponent; u32 report_format = dev_priv->perf.oa.oa_buffer.format; @@ -2366,15 +2366,6 @@ static int i915_ring_stream_init(struct i915_perf_stream *stream, SAMPLE_TS); int ret; - /* To avoid the complexity of having to accurately filter - * counter reports and marshal to the appropriate client - * we currently only allow exclusive access - */ - if (dev_priv->perf.exclusive_stream) { - DRM_ERROR("Stream already in use\n"); - return -EBUSY; - } - if ((props->sample_flags & SAMPLE_CTX_ID) && !props->cs_mode) { if (IS_HASWELL(dev_priv)) { DRM_ERROR( @@ -2392,6 +2383,12 @@ static int i915_ring_stream_init(struct i915_perf_stream *stream, if (require_oa_unit) { int format_size; + /* Only allow exclusive access per stream */ + if (dev_priv->perf.ring_stream[RCS]) { + DRM_ERROR("Stream:0 already in use\n"); + return -EBUSY; + } + /* If the sysfs metrics/ directory wasn't registered for some * reason then don't let userspace try their luck with config * IDs @@ -2536,6 +2533,13 @@ static int i915_ring_stream_init(struct i915_perf_stream *stream, } if (props->cs_mode) { + /* Only allow exclusive access per stream */ + if (dev_priv->perf.ring_stream[props->engine]) { + DRM_ERROR("Stream:%d already in use\n", props->engine); + ret = -EBUSY; + goto cs_error; + } + if (!cs_sample_data) { DRM_ERROR( "Ring given without requesting any CS data to sample"); @@ -2576,7 +2580,7 @@ static int i915_ring_stream_init(struct i915_perf_stream *stream, stream->ops = &i915_oa_stream_ops; - dev_priv->perf.exclusive_stream = stream; + dev_priv->perf.ring_stream[stream->engine] = stream; return 0; @@ -2612,8 +2616,8 @@ i915_oa_legacy_context_pin_notify_locked(struct drm_i915_private *dev_priv, if (dev_priv->perf.oa.ops.update_hw_ctx_id_locked == NULL) return; - if (dev_priv->perf.exclusive_stream && - dev_priv->perf.exclusive_stream->ctx == ctx) { + if (dev_priv->perf.ring_stream[RCS] && + dev_priv->perf.ring_stream[RCS]->ctx == ctx) { struct i915_vma *vma = ctx->engine[RCS].state; u32 ctx_id = i915_ggtt_offset(vma); @@ -2682,8 +2686,8 @@ void i915_oa_legacy_ctx_switch_notify(struct drm_i915_gem_request *req) if (dev_priv->perf.oa.ops.legacy_ctx_switch_unlocked == NULL) return; - if (dev_priv->perf.exclusive_stream && - dev_priv->perf.exclusive_stream->state != + if (dev_priv->perf.ring_stream[RCS] && + dev_priv->perf.ring_stream[RCS]->state != I915_PERF_STREAM_DISABLED) { /* XXX: We don't take a lock here and this may run @@ -2846,19 +2850,12 @@ static ssize_t i915_perf_read(struct file *file, return ret; } -static enum hrtimer_restart poll_check_timer_cb(struct hrtimer *hrtimer) +static void wake_up_perf_streams(void *data, async_cookie_t cookie) { + struct drm_i915_private *dev_priv = data; struct i915_perf_stream *stream; - struct drm_i915_private *dev_priv = - container_of(hrtimer, typeof(*dev_priv), - perf.poll_check_timer); - - /* No need to protect the streams list here, since the hrtimer is - * disabled before the stream is removed from list, and currently a - * single exclusive_stream is supported. - * XXX: revisit this when multiple concurrent streams are supported. - */ + mutex_lock(&dev_priv->perf.streams_lock); list_for_each_entry(stream, &dev_priv->perf.streams, link) { if (stream_have_data__unlocked(stream)) { atomic_set(&dev_priv->perf.pollin[stream->engine], @@ -2866,6 +2863,16 @@ static enum hrtimer_restart poll_check_timer_cb(struct hrtimer *hrtimer) wake_up(&dev_priv->perf.poll_wq[stream->engine]); } } + mutex_unlock(&dev_priv->perf.streams_lock); +} + +static enum hrtimer_restart poll_check_timer_cb(struct hrtimer *hrtimer) +{ + struct drm_i915_private *dev_priv = + container_of(hrtimer, typeof(*dev_priv), + perf.poll_check_timer); + + async_schedule(wake_up_perf_streams, dev_priv); hrtimer_forward_now(hrtimer, ns_to_ktime(POLL_PERIOD));