Message ID | 1479133188-30384-1-git-send-email-ander.conselvan.de.oliveira@intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
On ma, 2016-11-14 at 16:19 +0200, Ander Conselvan de Oliveira wrote: > From: Rodrigo Vivi <rodrigo.vivi@intel.com> > > The following LP platform inherits a lot of this platform > So let's simplify here to re-use this later. > > v2: Keep ddb_size out of the new macro. > > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> > Signed-off-by: Ander Conselvan de Oliveira > <ander.conselvan.de.oliveira@intel.com> Needs a rebase due to new .has_decoupled_mmio, with that in GEN9_LP_FEATURES: Reviewed-by: Imre Deak <imre.deak@intel.com> > --- > drivers/gpu/drm/i915/i915_pci.c | 45 ++++++++++++++++++++++--------- > ---------- > 1 file changed, 24 insertions(+), 21 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_pci.c > b/drivers/gpu/drm/i915/i915_pci.c > index 70a99ce..f8b93c1 100644 > --- a/drivers/gpu/drm/i915/i915_pci.c > +++ b/drivers/gpu/drm/i915/i915_pci.c > @@ -343,30 +343,33 @@ static const struct intel_device_info > intel_skylake_gt3_info = { > .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING > | BSD2_RING, > }; > > +#define GEN9_LP_FEATURES \ > + .gen = 9, \ > + .has_hotplug = 1, \ > + .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING, > \ > + .num_pipes = 3, \ > + .has_64bit_reloc = 1, \ > + .has_ddi = 1, \ > + .has_fpga_dbg = 1, \ > + .has_fbc = 1, \ > + .has_runtime_pm = 1, \ > + .has_pooled_eu = 0, \ > + .has_csr = 1, \ > + .has_resource_streamer = 1, \ > + .has_rc6 = 1, \ > + .has_dp_mst = 1, \ > + .has_gmbus_irq = 1, \ > + .has_hw_contexts = 1, \ > + .has_logical_ring_contexts = 1, \ > + .has_guc = 1, \ > + GEN_DEFAULT_PIPEOFFSETS, \ > + IVB_CURSOR_OFFSETS, \ > + BDW_COLORS > + > static const struct intel_device_info intel_broxton_info = { > .is_broxton = 1, > - .gen = 9, > - .has_hotplug = 1, > - .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING, > - .num_pipes = 3, > - .has_64bit_reloc = 1, > - .has_ddi = 1, > - .has_fpga_dbg = 1, > - .has_fbc = 1, > - .has_runtime_pm = 1, > - .has_pooled_eu = 0, > - .has_csr = 1, > - .has_resource_streamer = 1, > - .has_rc6 = 1, > - .has_dp_mst = 1, > - .has_gmbus_irq = 1, > - .has_hw_contexts = 1, > - .has_logical_ring_contexts = 1, > - .has_guc = 1, > + GEN9_LP_FEATURES, > .ddb_size = 512, > - GEN_DEFAULT_PIPEOFFSETS, > - IVB_CURSOR_OFFSETS, > - BDW_COLORS, > }; > > static const struct intel_device_info intel_kabylake_info = {
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c index 70a99ce..f8b93c1 100644 --- a/drivers/gpu/drm/i915/i915_pci.c +++ b/drivers/gpu/drm/i915/i915_pci.c @@ -343,30 +343,33 @@ static const struct intel_device_info intel_skylake_gt3_info = { .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING, }; +#define GEN9_LP_FEATURES \ + .gen = 9, \ + .has_hotplug = 1, \ + .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING, \ + .num_pipes = 3, \ + .has_64bit_reloc = 1, \ + .has_ddi = 1, \ + .has_fpga_dbg = 1, \ + .has_fbc = 1, \ + .has_runtime_pm = 1, \ + .has_pooled_eu = 0, \ + .has_csr = 1, \ + .has_resource_streamer = 1, \ + .has_rc6 = 1, \ + .has_dp_mst = 1, \ + .has_gmbus_irq = 1, \ + .has_hw_contexts = 1, \ + .has_logical_ring_contexts = 1, \ + .has_guc = 1, \ + GEN_DEFAULT_PIPEOFFSETS, \ + IVB_CURSOR_OFFSETS, \ + BDW_COLORS + static const struct intel_device_info intel_broxton_info = { .is_broxton = 1, - .gen = 9, - .has_hotplug = 1, - .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING, - .num_pipes = 3, - .has_64bit_reloc = 1, - .has_ddi = 1, - .has_fpga_dbg = 1, - .has_fbc = 1, - .has_runtime_pm = 1, - .has_pooled_eu = 0, - .has_csr = 1, - .has_resource_streamer = 1, - .has_rc6 = 1, - .has_dp_mst = 1, - .has_gmbus_irq = 1, - .has_hw_contexts = 1, - .has_logical_ring_contexts = 1, - .has_guc = 1, + GEN9_LP_FEATURES, .ddb_size = 512, - GEN_DEFAULT_PIPEOFFSETS, - IVB_CURSOR_OFFSETS, - BDW_COLORS, }; static const struct intel_device_info intel_kabylake_info = {