From patchwork Tue Nov 29 14:54:39 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Sharma, Shashank" X-Patchwork-Id: 9452257 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 4EF0B60235 for ; Tue, 29 Nov 2016 14:43:55 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 42F9F28364 for ; Tue, 29 Nov 2016 14:43:55 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 37D9628389; Tue, 29 Nov 2016 14:43:55 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 3EB4828387 for ; Tue, 29 Nov 2016 14:43:54 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 5F0466E43A; Tue, 29 Nov 2016 14:43:52 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTPS id 33F9F6E43A; Tue, 29 Nov 2016 14:43:51 +0000 (UTC) Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by orsmga102.jf.intel.com with ESMTP; 29 Nov 2016 06:43:50 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.31,717,1473145200"; d="scan'208";a="792134281" Received: from shashanks-desktop.iind.intel.com ([10.223.26.24]) by FMSMGA003.fm.intel.com with ESMTP; 29 Nov 2016 06:43:48 -0800 From: Shashank Sharma To: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org Date: Tue, 29 Nov 2016 20:24:39 +0530 Message-Id: <1480431279-20856-1-git-send-email-shashank.sharma@intel.com> X-Mailer: git-send-email 1.9.1 Cc: airlied@redhat.com, daniel.vetter@intel.com Subject: [Intel-gfx] [PATCH] drm: parse hf-vsdb X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP HDMI 2.0 / CEA-861-F specs define a new CEA extension data block, called hdmi-forum vendor specific data block (HF-VSDB). This block contains information about sink's support for HDMI 2.0 compliant features. These features are: - Deep color YUV 420 support and BPC - 3D flags for - OSD Displarity - Dual view signaling - independent view signaling - SCDC support - Max TMDS char rate - Scrambling support This patch adds a parser function for this block, and add flags to indicate support for new features, in drm_display_info structure. Signed-off-by: Shashank Sharma --- drivers/gpu/drm/drm_edid.c | 73 +++++++++++++++++++++++++++++++++++++++++++++ include/drm/drm_connector.h | 48 +++++++++++++++++++++++++++++ include/drm/drm_edid.h | 5 ++++ include/linux/hdmi.h | 1 + 4 files changed, 127 insertions(+) diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c index 336be31..b18bfe0 100644 --- a/drivers/gpu/drm/drm_edid.c +++ b/drivers/gpu/drm/drm_edid.c @@ -3223,6 +3223,27 @@ static int add_3d_struct_modes(struct drm_connector *connector, u16 structure, return 0; } +static bool cea_db_is_hf_vsdb(const u8 *db) +{ + u8 len; + int hfvsdb_id; + + if (cea_db_tag(db) != VENDOR_BLOCK) + return false; + + len = cea_db_payload_len(db); + if (len < 7 || len > 31) + return false; + + /* version should be 1 */ + if (db[4] != 1) + return false; + + hfvsdb_id = db[1] | (db[2] << 8) | (db[3] << 16); + + return hfvsdb_id == HDMI_IEEE_OUI_HFVSDB; +} + static bool cea_db_is_hdmi_vsdb(const u8 *db) { int hdmi_id; @@ -3767,6 +3788,56 @@ bool drm_rgb_quant_range_selectable(struct edid *edid) } EXPORT_SYMBOL(drm_rgb_quant_range_selectable); +static void drm_parse_yuv420_deep_color_info(struct drm_connector *connector, + const u8 *db) +{ + struct drm_display_info *info = &connector->display_info; + + if (db[7] & DRM_EDID_YUV420_DC_48) + info->edid_yuv420_dc_modes |= DRM_EDID_YUV420_DC_48; + if (db[7] & DRM_EDID_YUV420_DC_36) + info->edid_yuv420_dc_modes |= DRM_EDID_YUV420_DC_36; + if (db[7] & DRM_EDID_YUV420_DC_30) + info->edid_yuv420_dc_modes |= DRM_EDID_YUV420_DC_30; + + if (!info->edid_yuv420_dc_modes) { + DRM_DEBUG("%s: No YUV 420 deep color support in sink.\n", + connector->name); + return; + } +} + +static void +drm_parse_hf_vsdb(struct drm_connector *connector, const u8 *db) +{ + struct drm_display_info *info = &connector->display_info; + + if (db[5]) { + /* + * If the sink supplies max tmds char rate in db, + * the actual max tmds rate = db[5] * 5Mhz. + */ + info->max_tmds_clock = db[5] * 5000; + DRM_DEBUG_KMS("HF-VSDB: max TMDS clock %d kHz\n", + info->max_tmds_clock); + } + + if (db[6] & DRM_HFVSDB_SCDC_SUPPORT) + info->scdc_supported = true; + if (db[6] & DRM_HFVSDB_SCDC_RR_CAP) + info->scdc_rr_cap = true; + if (db[6] & DRM_HFVSDB_SCRAMBLING) + info->scrambling = true; + if (db[6] & DRM_HFVSDB_INDEPENDENT_VIEW) + info->independent_view_3d = true; + if (db[6] & DRM_HFVSDB_DUAL_VIEW) + info->dual_view_3d = true; + if (db[6] & DRM_HFVSDB_3D_OSD) + info->osd_disparity_3d = true; + + drm_parse_yuv420_deep_color_info(connector, db); +} + static void drm_parse_hdmi_deep_color_info(struct drm_connector *connector, const u8 *hdmi) { @@ -3881,6 +3952,8 @@ static void drm_parse_cea_ext(struct drm_connector *connector, if (cea_db_is_hdmi_vsdb(db)) drm_parse_hdmi_vsdb_video(connector, db); + if (cea_db_is_hf_vsdb(db)) + drm_parse_hf_vsdb(connector, db); } } diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h index 34f9741..d011dd5 100644 --- a/include/drm/drm_connector.h +++ b/include/drm/drm_connector.h @@ -167,6 +167,46 @@ struct drm_display_info { */ u32 bus_flags; +#define DRM_HFVSDB_SCDC_SUPPORT (1<<7) +#define DRM_HFVSDB_SCDC_RR_CAP (1<<6) +#define DRM_HFVSDB_SCRAMBLING (1<<3) +#define DRM_HFVSDB_INDEPENDENT_VIEW (1<<2) +#define DRM_HFVSDB_DUAL_VIEW (1<<1) +#define DRM_HFVSDB_3D_OSD (1<<0) + + /** + * @scdc_supported: Sink supports SCDC functionality. + */ + bool scdc_supported; + + /** + * @scdc_rr_cap: Sink has SCDC read request capability. + */ + bool scdc_rr_cap; + + /** + * @scrambling: Sync supports scrambling for <=340 Mcsc TMDS + * char rates. Above 340 Mcsc rates, scrambling is always reqd. + */ + bool scrambling; + + /** + * @independent_view_3d: Sink supports 3d independent view signaling + * in HF-VSIF. + */ + bool independent_view_3d; + + /** + * @dual_view_3d: Sink supports 3d dual view signaling in HF-VSIF. + */ + bool dual_view_3d; + + /** + * @osd_disparity_3d: Sink supports 3d osd disparity indication + * in HF-VSIF. + */ + bool osd_disparity_3d; + /** * @max_tmds_clock: Maximum TMDS clock rate supported by the * sink in kHz. 0 means undefined. @@ -185,6 +225,14 @@ struct drm_display_info { u8 edid_hdmi_dc_modes; /** + * @edid_yuv420_dc_modes: bpc for deep color yuv420 encoding. + * various sinks can support 10/12/16 bit per channel deep + * color encoding. edid_yuv420_dc_modes = 0 means sink doesn't + * support deep color yuv420 encoding. + */ + u8 edid_yuv420_dc_modes; + + /** * @cea_rev: CEA revision of the HDMI sink. */ u8 cea_rev; diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h index 38eabf6..5df8b9c 100644 --- a/include/drm/drm_edid.h +++ b/include/drm/drm_edid.h @@ -212,6 +212,11 @@ struct detailed_timing { #define DRM_EDID_HDMI_DC_30 (1 << 4) #define DRM_EDID_HDMI_DC_Y444 (1 << 3) +/* YUV 420 deep color modes */ +#define DRM_EDID_YUV420_DC_48 (1 << 6) +#define DRM_EDID_YUV420_DC_36 (1 << 5) +#define DRM_EDID_YUV420_DC_30 (1 << 5) + /* ELD Header Block */ #define DRM_ELD_HEADER_BLOCK_SIZE 4 diff --git a/include/linux/hdmi.h b/include/linux/hdmi.h index edbb4fc..2d4e9ef 100644 --- a/include/linux/hdmi.h +++ b/include/linux/hdmi.h @@ -35,6 +35,7 @@ enum hdmi_infoframe_type { }; #define HDMI_IEEE_OUI 0x000c03 +#define HDMI_IEEE_OUI_HFVSDB 0xC45DD8 #define HDMI_INFOFRAME_HEADER_SIZE 4 #define HDMI_AVI_INFOFRAME_SIZE 13 #define HDMI_SPD_INFOFRAME_SIZE 25