From patchwork Wed Nov 30 23:31:34 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Srivatsa, Anusha" X-Patchwork-Id: 9455105 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 12E6E6074E for ; Wed, 30 Nov 2016 23:32:27 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 062AA2838D for ; Wed, 30 Nov 2016 23:32:27 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id EEFEE2848E; Wed, 30 Nov 2016 23:32:26 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 8A8862838D for ; Wed, 30 Nov 2016 23:32:26 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E9ACD6E611; Wed, 30 Nov 2016 23:32:22 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by gabe.freedesktop.org (Postfix) with ESMTPS id D70ED6E5DC for ; Wed, 30 Nov 2016 23:31:40 +0000 (UTC) Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga103.jf.intel.com with ESMTP; 30 Nov 2016 15:31:40 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos; i="5.31,723,1473145200"; d="scan'208"; a="1066375242" Received: from anusha.jf.intel.com ([10.7.198.172]) by orsmga001.jf.intel.com with ESMTP; 30 Nov 2016 15:31:40 -0800 From: Anusha Srivatsa To: intel-gfx@lists.freedesktop.org Date: Wed, 30 Nov 2016 15:31:34 -0800 Message-Id: <1480548694-23000-9-git-send-email-anusha.srivatsa@intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1480548694-23000-1-git-send-email-anusha.srivatsa@intel.com> References: <1480548694-23000-1-git-send-email-anusha.srivatsa@intel.com> Cc: Peter Antoine Subject: [Intel-gfx] [PATCH 8/8] drm/i915/get_params: Add HuC status to getparams X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP From: Peter Antoine This patch will allow for getparams to return the status of the HuC. As the HuC has to be validated by the GuC this patch uses the validated status to show when the HuC is loaded and ready for use. You cannot use the loaded status as with the GuC as the HuC is verified after it is loaded and is not usable until it is verified. v2: removed the forewakes as the registers are already force-woken. (T.Ursulin) v4: rebased. v5: rebased on top of drm-tip. Signed-off-by: Peter Antoine Reviewed-by: Arkadiusz Hiler --- drivers/gpu/drm/i915/i915_drv.c | 5 +++++ drivers/gpu/drm/i915/intel_huc.h | 1 + drivers/gpu/drm/i915/intel_huc_loader.c | 12 ++++++++++++ include/uapi/drm/i915_drm.h | 1 + 4 files changed, 19 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 075d9ce..75a3e24 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -49,6 +49,8 @@ #include "i915_trace.h" #include "i915_vgpu.h" #include "intel_drv.h" +#include "intel_uc.h" +#include "intel_huc.h" static struct drm_driver driver; @@ -350,6 +352,9 @@ static int i915_getparam(struct drm_device *dev, void *data, */ value = 1; break; + case I915_PARAM_HAS_HUC: + value = intel_is_huc_valid(dev_priv); + break; default: DRM_DEBUG("Unknown parameter %d\n", param->param); return -EINVAL; diff --git a/drivers/gpu/drm/i915/intel_huc.h b/drivers/gpu/drm/i915/intel_huc.h index 1dd18c5..1b67311 100644 --- a/drivers/gpu/drm/i915/intel_huc.h +++ b/drivers/gpu/drm/i915/intel_huc.h @@ -39,4 +39,5 @@ struct intel_huc { void intel_huc_init(struct drm_device *dev); void intel_huc_fini(struct drm_device *dev); int intel_huc_load(struct drm_device *dev); +int intel_is_huc_valid(struct drm_i915_private *dev_priv); #endif diff --git a/drivers/gpu/drm/i915/intel_huc_loader.c b/drivers/gpu/drm/i915/intel_huc_loader.c index 20526a4..e18de0f6 100644 --- a/drivers/gpu/drm/i915/intel_huc_loader.c +++ b/drivers/gpu/drm/i915/intel_huc_loader.c @@ -292,3 +292,15 @@ void intel_huc_fini(struct drm_device *dev) huc_fw->fetch_status = UC_FIRMWARE_NONE; } +/** + * intel_is_huc_valid() - Check to see if the HuC is fully loaded. + * @dev_priv: drm device to check. + * + * This function will return true if the guc has been loaded and + * has valid firmware. The simplest way of doing this is to check + * if the HuC has been validated, if so it must have been loaded. + */ +int intel_is_huc_valid(struct drm_i915_private *dev_priv) +{ + return ((I915_READ(HUC_STATUS2) & HUC_FW_VERIFIED) != 0); +} diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h index bdfc688..397b47d 100644 --- a/include/uapi/drm/i915_drm.h +++ b/include/uapi/drm/i915_drm.h @@ -395,6 +395,7 @@ typedef struct drm_i915_irq_wait { * priorities and the driver will attempt to execute batches in priority order. */ #define I915_PARAM_HAS_SCHEDULER 41 +#define I915_PARAM_HAS_HUC 42 typedef struct drm_i915_getparam { __s32 param;