From patchwork Mon Dec 12 11:44:12 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Micha=C5=82_Winiarski?= X-Patchwork-Id: 9470493 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id DCE5160476 for ; Mon, 12 Dec 2016 11:45:05 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id CE9C628477 for ; Mon, 12 Dec 2016 11:45:05 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id C0AAC2847C; Mon, 12 Dec 2016 11:45:05 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 13E2028477 for ; Mon, 12 Dec 2016 11:45:05 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 539DE6E2BF; Mon, 12 Dec 2016 11:45:04 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by gabe.freedesktop.org (Postfix) with ESMTPS id 603236E2BF for ; Mon, 12 Dec 2016 11:45:02 +0000 (UTC) Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga104.fm.intel.com with ESMTP; 12 Dec 2016 03:45:01 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.33,336,1477983600"; d="scan'208";a="201598815" Received: from irsmsx102.ger.corp.intel.com ([163.33.3.155]) by fmsmga004.fm.intel.com with ESMTP; 12 Dec 2016 03:45:00 -0800 Received: from mwiniars-main.igk.intel.com (172.28.171.152) by IRSMSX102.ger.corp.intel.com (163.33.3.155) with Microsoft SMTP Server id 14.3.248.2; Mon, 12 Dec 2016 11:45:00 +0000 From: =?UTF-8?q?Micha=C5=82=20Winiarski?= To: Date: Mon, 12 Dec 2016 12:44:12 +0100 Message-ID: <1481543057-333-4-git-send-email-michal.winiarski@intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1481543057-333-1-git-send-email-michal.winiarski@intel.com> References: <1481543057-333-1-git-send-email-michal.winiarski@intel.com> MIME-Version: 1.0 X-Originating-IP: [172.28.171.152] Cc: Mika Kuoppala Subject: [Intel-gfx] [PATCH 3/8] drm/i915/gtt: Extract unwind to separate function for gen6_alloc_va_range X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP In case of error during allocation we should free the entries allocated during the current "transaction". We can't simply reuse the clear_range, since for gen6 we're not shrinking ppgtt. We can extract unwind to a function though, and use range rather than bitmaps. Cc: Arkadiusz Hiler Cc: Chris Wilson Cc: Joonas Lahtinen Cc: Michel Thierry Cc: Mika Kuoppala Signed-off-by: Michał Winiarski --- drivers/gpu/drm/i915/i915_gem_gtt.c | 33 +++++++++++++++++++++------------ 1 file changed, 21 insertions(+), 12 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c index 49e1006..f760c3e 100644 --- a/drivers/gpu/drm/i915/i915_gem_gtt.c +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c @@ -1917,6 +1917,23 @@ static void gen6_ppgtt_insert_entries(struct i915_address_space *vm, kunmap_px(ppgtt, pt_vaddr); } +static void gen6_ppgtt_unwind_pd(struct i915_address_space *vm, + struct i915_page_directory *pd, + uint64_t start, uint64_t length) { + + struct i915_page_table *pt; + uint64_t pde; + + /* We're only using this for cleanup on PT allocation failure, + * and since in this case scratch_pt is already encoded in pde there's + * no need to call gen6_write_pde. + */ + gen6_for_each_pde(pt, pd, start, length, pde) { + pd->page_table[pde] = vm->scratch_pt; + free_pt(vm->i915, pt); + } +} + static int gen6_alloc_va_range(struct i915_address_space *vm, uint64_t start, uint64_t length) { @@ -1954,7 +1971,10 @@ static int gen6_alloc_va_range(struct i915_address_space *vm, pt = alloc_pt(dev_priv); if (IS_ERR(pt)) { ret = PTR_ERR(pt); - goto unwind_out; + gen6_ppgtt_unwind_pd(vm, &ppgtt->pd, + start_save, start - start_save); + mark_tlbs_dirty(ppgtt); + return ret; } gen6_initialize_pt(vm, pt); @@ -1993,17 +2013,6 @@ static int gen6_alloc_va_range(struct i915_address_space *vm, mark_tlbs_dirty(ppgtt); return 0; - -unwind_out: - for_each_set_bit(pde, new_page_tables, I915_PDES) { - struct i915_page_table *pt = ppgtt->pd.page_table[pde]; - - ppgtt->pd.page_table[pde] = vm->scratch_pt; - free_pt(dev_priv, pt); - } - - mark_tlbs_dirty(ppgtt); - return ret; } static int gen6_init_scratch(struct i915_address_space *vm)