From patchwork Thu Dec 15 09:01:39 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Chauhan, Madhav" X-Patchwork-Id: 9475687 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 982C460825 for ; Thu, 15 Dec 2016 09:06:27 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 80ED02852A for ; Thu, 15 Dec 2016 09:06:27 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 7472528745; Thu, 15 Dec 2016 09:06:27 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id B74572852A for ; Thu, 15 Dec 2016 09:06:26 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 4A5AA894C3; Thu, 15 Dec 2016 09:06:25 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by gabe.freedesktop.org (Postfix) with ESMTPS id 34CCA6E934 for ; Thu, 15 Dec 2016 09:06:02 +0000 (UTC) Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga105.fm.intel.com with ESMTP; 15 Dec 2016 01:06:02 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.33,351,1477983600"; d="scan'208";a="42609333" Received: from madhav-desktop.iind.intel.com ([10.223.25.13]) by orsmga005.jf.intel.com with ESMTP; 15 Dec 2016 01:05:59 -0800 From: Madhav Chauhan To: intel-gfx@lists.freedesktop.org Date: Thu, 15 Dec 2016 14:31:39 +0530 Message-Id: <1481792500-30863-9-git-send-email-madhav.chauhan@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1481792500-30863-1-git-send-email-madhav.chauhan@intel.com> References: <1481792500-30863-1-git-send-email-madhav.chauhan@intel.com> Cc: ander.conselvan.de.oliveira@intel.com, jani.nikula@intel.com, shobhit.kumar@intel.com Subject: [Intel-gfx] [GLK MIPI DSI V2 8/9] drm/i915/glk: Program dphy param reg for GLK X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP For GEMINILAKE, dphy param reg values are programmed in terms of HS byte clock while for legacy platforms in terms of ddrclk Signed-off-by: Madhav Chauhan --- drivers/gpu/drm/i915/intel_dsi_panel_vbt.c | 33 +++++++++++++++++++++++------- 1 file changed, 26 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c index 0d8ff00..647eca4 100644 --- a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c +++ b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c @@ -668,16 +668,26 @@ struct drm_panel *vbt_panel_init(struct intel_dsi *intel_dsi, u16 panel_id) /* count values in UI = (ns value) * (bitrate / (2 * 10^6)) * * Since txddrclkhs_i is 2xUI, all the count values programmed in - * DPHY param register are divided by 2 + * DPHY param register are divided by 2 except GEMINILAKE where it is + * programmed in terms of HS byte clock so divided by 8 * * prepare count */ ths_prepare_ns = max(mipi_config->ths_prepare, mipi_config->tclk_prepare); - prepare_cnt = DIV_ROUND_UP(ths_prepare_ns * ui_den, ui_num * 2); + if (IS_GEMINILAKE(dev_priv)) + prepare_cnt = DIV_ROUND_UP(ths_prepare_ns * ui_den, ui_num * 8); + else + prepare_cnt = DIV_ROUND_UP(ths_prepare_ns * ui_den, ui_num * 2); /* exit zero count */ - exit_zero_cnt = DIV_ROUND_UP( + if (IS_GEMINILAKE(dev_priv)) + exit_zero_cnt = DIV_ROUND_UP( + (ths_prepare_hszero - ths_prepare_ns) * ui_den, + ui_num * 8 + ); + else + exit_zero_cnt = DIV_ROUND_UP( (ths_prepare_hszero - ths_prepare_ns) * ui_den, ui_num * 2 ); @@ -692,13 +702,22 @@ struct drm_panel *vbt_panel_init(struct intel_dsi *intel_dsi, u16 panel_id) exit_zero_cnt += 1; /* clk zero count */ - clk_zero_cnt = DIV_ROUND_UP( - (tclk_prepare_clkzero - ths_prepare_ns) - * ui_den, 2 * ui_num); + if (IS_GEMINILAKE(dev_priv)) + clk_zero_cnt = DIV_ROUND_UP( + (tclk_prepare_clkzero - ths_prepare_ns) + * ui_den, 8 * ui_num); + else + clk_zero_cnt = DIV_ROUND_UP( + (tclk_prepare_clkzero - ths_prepare_ns) + * ui_den, 2 * ui_num); /* trail count */ tclk_trail_ns = max(mipi_config->tclk_trail, mipi_config->ths_trail); - trail_cnt = DIV_ROUND_UP(tclk_trail_ns * ui_den, 2 * ui_num); + + if (IS_GEMINILAKE(dev_priv)) + trail_cnt = DIV_ROUND_UP(tclk_trail_ns * ui_den, 8 * ui_num); + else + trail_cnt = DIV_ROUND_UP(tclk_trail_ns * ui_den, 2 * ui_num); if (prepare_cnt > PREPARE_CNT_MAX || exit_zero_cnt > EXIT_ZERO_CNT_MAX ||