From patchwork Fri Dec 30 05:25:24 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: vathsala nagaraju X-Patchwork-Id: 9491809 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 0CB4560417 for ; Fri, 30 Dec 2016 05:26:10 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id EFCE51FF65 for ; Fri, 30 Dec 2016 05:26:09 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E4E8E2018E; Fri, 30 Dec 2016 05:26:09 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id AC0591FF65 for ; Fri, 30 Dec 2016 05:26:09 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 1AA796E1C9; Fri, 30 Dec 2016 05:26:04 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id 2A3B36E1C5 for ; Fri, 30 Dec 2016 05:26:03 +0000 (UTC) Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga104.jf.intel.com with ESMTP; 29 Dec 2016 21:26:03 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos; i="5.33,428,1477983600"; d="scan'208"; a="1105911672" Received: from vnagaraj-hp-elitedesk-800-g1-twr.iind.intel.com ([10.223.107.106]) by fmsmga002.fm.intel.com with ESMTP; 29 Dec 2016 21:26:01 -0800 From: vathsala nagaraju To: intel-gfx@lists.freedesktop.org Date: Fri, 30 Dec 2016 10:55:24 +0530 Message-Id: <1483075524-25189-11-git-send-email-vathsala.nagaraju@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1483075524-25189-1-git-send-email-vathsala.nagaraju@intel.com> References: <1483075524-25189-1-git-send-email-vathsala.nagaraju@intel.com> Cc: Rodrigo Vivi Subject: [Intel-gfx] [PATCH 10/10] drm/i915/psr: EDP_PSR_PERF_CNT not valid for psr2 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP PSR1 and PSR2 enable sequence are mutually exclusive. Register SRD_PERF_COUNT increments while system is in psr1. This register is not valid for psr2.while in psr2,SRD_PERF_COUNT is always 0. Reporting psr perfcount from SRD_PERF_COUNT is not valid for psr2 case. Also, if dc6 is disabled via kernel parameter i915.enable_dc=0, EDP_PSR_PERF_CNT can be reported for SKL+ platforms for debug purpose. Cc: Rodrigo Vivi Cc: Jim Bride Signed-off-by: Vathsala Nagaraju --- drivers/gpu/drm/i915/i915_debugfs.c | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index 55bcdd2..265474d 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c @@ -2539,6 +2539,7 @@ static int i915_edp_psr_status(struct seq_file *m, void *data) u32 stat[3]; enum pipe pipe; bool enabled = false; + bool dc6_enabled = false; if (!HAS_PSR(dev_priv)) { seq_puts(m, "PSR not supported\n"); @@ -2598,11 +2599,20 @@ static int i915_edp_psr_status(struct seq_file *m, void *data) /* * VLV/CHV PSR has no kind of performance counter + * EDP_PSR_PERF_CNT is not valid for psr2. * SKL+ Perf counter is reset to 0 everytime DC state is entered + * if we want to read EDP_PSR_PERF_CNT for debug purpose on SKL+, + * disable dc state in kernel parameter i915.enable_dc=0. */ - if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { + + dc6_enabled = ((I915_READ(DC_STATE_EN) & + DC_STATE_EN_UPTO_DC5_DC6_MASK) == + DC_STATE_EN_UPTO_DC6); + + if ((!dev_priv->psr.psr2_support && !dc6_enabled) || + IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { psrperf = I915_READ(EDP_PSR_PERF_CNT) & - EDP_PSR_PERF_CNT_MASK; + EDP_PSR_PERF_CNT_MASK; seq_printf(m, "Performance_Counter: %u\n", psrperf); }