From patchwork Fri Jan 6 16:32:32 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: vathsala nagaraju X-Patchwork-Id: 9501483 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 21FC06021C for ; Fri, 6 Jan 2017 16:32:42 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 000FF1FF13 for ; Fri, 6 Jan 2017 16:32:41 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E85F22074F; Fri, 6 Jan 2017 16:32:41 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 7590E1FF13 for ; Fri, 6 Jan 2017 16:32:41 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id DB6B06EA60; Fri, 6 Jan 2017 16:32:39 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by gabe.freedesktop.org (Postfix) with ESMTPS id E58716EA5F; Fri, 6 Jan 2017 16:32:37 +0000 (UTC) Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga105.fm.intel.com with ESMTP; 06 Jan 2017 08:32:36 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.33,325,1477983600"; d="scan'208";a="919656970" Received: from vnagaraj-hp-elitedesk-800-g1-twr.iind.intel.com ([10.223.107.106]) by orsmga003.jf.intel.com with ESMTP; 06 Jan 2017 08:32:34 -0800 From: vathsala nagaraju To: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org Date: Fri, 6 Jan 2017 22:02:32 +0530 Message-Id: <1483720352-24761-1-git-send-email-vathsala.nagaraju@intel.com> X-Mailer: git-send-email 1.9.1 Cc: Patil Deepti , Rodrigo Vivi Subject: [Intel-gfx] [PATCH 09/10] drm/i915/psr: report live PSR2 State X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Reports live state of PSR2 form PSR2_STATUS register. bit field 31:28 gives the live state of PSR2. It can be used to check if system is in deep sleep, selective update or selective update standby. During video play back, we can use this to check if system is entering SU mode or not. when system is in idle state, DEEP_SLEEP(8) must be entered. When video playback is happening, system must be in SLEEP(3 / selective update) or SU_STANDBY( 6 / selective update standby) v2: (Rodrigo) - Remove EDP_PSR2_STATUS_TG_ON=a ,instead use ARRAY_SIZE Cc: Rodrigo Vivi Cc: Jim Bride Signed-off-by: Vathsala Nagaraju Signed-off-by: Patil Deepti Reviewed-by: Rodrigo Vivi --- drivers/gpu/drm/i915/i915_debugfs.c | 24 ++++++++++++++++++++++++ drivers/gpu/drm/i915/i915_reg.h | 1 + 2 files changed, 25 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index 9d7b5a8..ec9013e 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c @@ -2606,6 +2606,30 @@ static int i915_edp_psr_status(struct seq_file *m, void *data) seq_printf(m, "Performance_Counter: %u\n", psrperf); } + if (dev_priv->psr.psr2_support) { + static const char * const live_status[] = { + "IDLE", + "CAPTURE", + "CAPTURE_FS", + "SLEEP", + "BUFON_FW", + "ML_UP", + "SU_STANDBY", + "FAST_SLEEP", + "DEEP_SLEEP", + "BUF_ON", + "TG_ON" }; + u8 pos = (I915_READ(EDP_PSR2_STATUS_CTL) & + EDP_PSR2_STATUS_STATE_MASK) >> + EDP_PSR2_STATUS_STATE_SHIFT; + + seq_printf(m, "PSR2_STATUS_EDP: %x\n", + I915_READ(EDP_PSR2_STATUS_CTL)); + + if (pos < ARRAY_SIZE(live_status)) + seq_printf(m, "PSR2 live state %s\n", + live_status[pos]); + } mutex_unlock(&dev_priv->psr.lock); intel_runtime_pm_put(dev_priv); diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 272a283..65fffc5 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -3621,6 +3621,7 @@ enum { #define EDP_PSR2_STATUS_CTL _MMIO(0x6f940) #define EDP_PSR2_STATUS_STATE_MASK (0xf<<28) +#define EDP_PSR2_STATUS_STATE_SHIFT 28 /* VGA port control */ #define ADPA _MMIO(0x61100)