From patchwork Mon Feb 6 07:04:55 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Wang, Zhi A" X-Patchwork-Id: 9557195 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 0601B602B1 for ; Mon, 6 Feb 2017 07:14:49 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id ED3A5267EC for ; Mon, 6 Feb 2017 07:14:48 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E10C0271E0; Mon, 6 Feb 2017 07:14:48 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 6194E267EC for ; Mon, 6 Feb 2017 07:14:48 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id DAA1E6E2E4; Mon, 6 Feb 2017 07:14:47 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTPS id D5FC96E2E4 for ; Mon, 6 Feb 2017 07:14:46 +0000 (UTC) Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga102.jf.intel.com with ESMTP; 05 Feb 2017 23:14:46 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.33,341,1477983600"; d="scan'208";a="61597050" Received: from dev-inno.bj.intel.com ([10.238.135.53]) by fmsmga005.fm.intel.com with ESMTP; 05 Feb 2017 23:14:44 -0800 From: Zhi Wang To: intel-gfx@lists.freedesktop.org Date: Mon, 6 Feb 2017 15:04:55 +0800 Message-Id: <1486364695-8727-1-git-send-email-zhi.a.wang@intel.com> X-Mailer: git-send-email 1.9.1 Cc: Zhiyuan Lv Subject: [Intel-gfx] [PATCH] drm/i915: Re-enable aliasing PPGTT mode. X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Aliasing PPGTT mode is broken due to recent changes. Mostly boot the system with i915.enable_ppgtt=1 will lead a kernel crash. This patch fixes this problem by: - PPGTT page table will not be shrinkable if working under aliasing PPGTT mode. - Load the root pointers of the PPGTT page table during the context initialization, as currently the "LRI PDPs updating" magic only works under full PPGTT mode and also GVT-g doesn't support LRI PDP updating. Tested on my SKL NUC box. Cc: Tvrtko Ursulin Cc: Michal Winiarski Cc: Michel Thierry Cc: Joonas Lahtinen Cc: Chris Wilson Cc: Zhenyu Wang Cc: Zhiyuan Lv Signed-off-by: Zhi Wang --- drivers/gpu/drm/i915/i915_gem_gtt.c | 15 ++++++++++++--- drivers/gpu/drm/i915/intel_lrc.c | 5 +++++ 2 files changed, 17 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c index 68ecfc1..4e06056 100644 --- a/drivers/gpu/drm/i915/i915_gem_gtt.c +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c @@ -754,10 +754,19 @@ static bool gen8_ppgtt_clear_pt(struct i915_address_space *vm, GEM_BUG_ON(pte_end > GEN8_PTES); - bitmap_clear(pt->used_ptes, pte, num_entries); + /* + * As there is only one PPGTT page table used to mirror the GGTT + * space in the system under aliasing PPGTT mode, we don't need + * to shrink it. Leave the PT pages "always used", so the upper + * level page table pages are safe during clear_range(). + * + */ + if (USES_FULL_PPGTT(vm->i915)) { + bitmap_clear(pt->used_ptes, pte, num_entries); - if (bitmap_empty(pt->used_ptes, GEN8_PTES)) - return true; + if (bitmap_empty(pt->used_ptes, GEN8_PTES)) + return true; + } pt_vaddr = kmap_px(pt); diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c index 44a92ea..9575562 100644 --- a/drivers/gpu/drm/i915/intel_lrc.c +++ b/drivers/gpu/drm/i915/intel_lrc.c @@ -2009,6 +2009,11 @@ static void execlists_init_reg_state(u32 *reg_state, * other PDP Descriptors are ignored. */ ASSIGN_CTX_PML4(ppgtt, reg_state); + } else { + ASSIGN_CTX_PDP(ppgtt, reg_state, 0); + ASSIGN_CTX_PDP(ppgtt, reg_state, 1); + ASSIGN_CTX_PDP(ppgtt, reg_state, 2); + ASSIGN_CTX_PDP(ppgtt, reg_state, 3); } if (engine->id == RCS) {