From patchwork Wed May 3 00:51:23 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Li, Weinan Z" X-Patchwork-Id: 9708719 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id B409560351 for ; Wed, 3 May 2017 00:57:43 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A20DC2841D for ; Wed, 3 May 2017 00:57:43 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 93853285F0; Wed, 3 May 2017 00:57:43 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 2176B2841D for ; Wed, 3 May 2017 00:57:43 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id BFE076E29E; Wed, 3 May 2017 00:57:42 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by gabe.freedesktop.org (Postfix) with ESMTPS id 413896E1A5; Wed, 3 May 2017 00:57:41 +0000 (UTC) Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga105.jf.intel.com with ESMTP; 02 May 2017 17:57:40 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.38,281,1491289200"; d="scan'208";a="94834899" Received: from weinanli-build.sh.intel.com ([10.239.12.23]) by orsmga005.jf.intel.com with ESMTP; 02 May 2017 17:57:39 -0700 From: Weinan Li To: intel-gfx@lists.freedesktop.org, intel-gvt-dev@lists.freedesktop.org Date: Wed, 3 May 2017 08:51:23 +0800 Message-Id: <1493772683-10629-1-git-send-email-weinan.z.li@intel.com> X-Mailer: git-send-email 1.9.1 Subject: [Intel-gfx] [PATCH v3] drm/i915/gvt: return the actual aperture size under gvt environment X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP I915_GEM_GET_APERTURE ioctl is used to probe aperture size from userspace. In gvt environment, each vm only use the ballooned part of aperture, so we should return the actual available aperture size exclude the reserved part by balloon. v2: add 'reserved' in struct i915_address_space to record the reserved size in ggtt by balloon. v3: remain aper_size as total, adjust aper_available_size exclude reserved and pinned. UMD driver need to adjust the max allocation size according to the available aperture size but not total size. Signed-off-by: Weinan Li --- drivers/gpu/drm/i915/i915_gem.c | 7 +++---- drivers/gpu/drm/i915/i915_gem_gtt.h | 3 ++- drivers/gpu/drm/i915/i915_vgpu.c | 5 ++++- 3 files changed, 9 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 84ea249..e84576c 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -145,9 +145,8 @@ int i915_mutex_lock_interruptible(struct drm_device *dev) struct i915_ggtt *ggtt = &dev_priv->ggtt; struct drm_i915_gem_get_aperture *args = data; struct i915_vma *vma; - size_t pinned; + size_t pinned = 0; - pinned = 0; mutex_lock(&dev->struct_mutex); list_for_each_entry(vma, &ggtt->base.active_list, vm_link) if (i915_vma_is_pinned(vma)) @@ -158,8 +157,8 @@ int i915_mutex_lock_interruptible(struct drm_device *dev) mutex_unlock(&dev->struct_mutex); args->aper_size = ggtt->base.total; - args->aper_available_size = args->aper_size - pinned; - + args->aper_available_size = args->aper_size + - ggtt->base.reserved - pinned; return 0; } diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h b/drivers/gpu/drm/i915/i915_gem_gtt.h index fb15684..bdf832d 100644 --- a/drivers/gpu/drm/i915/i915_gem_gtt.h +++ b/drivers/gpu/drm/i915/i915_gem_gtt.h @@ -255,7 +255,8 @@ struct i915_address_space { struct drm_i915_file_private *file; struct list_head global_link; u64 total; /* size addr space maps (ex. 2GB for ggtt) */ - + /* size addr space reserved by GVT balloon, only used for ggtt */ + u64 reserved; bool closed; struct i915_page_dma scratch_page; diff --git a/drivers/gpu/drm/i915/i915_vgpu.c b/drivers/gpu/drm/i915/i915_vgpu.c index 4ab8a97..58055a9 100644 --- a/drivers/gpu/drm/i915/i915_vgpu.c +++ b/drivers/gpu/drm/i915/i915_vgpu.c @@ -183,7 +183,7 @@ int intel_vgt_balloon(struct drm_i915_private *dev_priv) unsigned long mappable_base, mappable_size, mappable_end; unsigned long unmappable_base, unmappable_size, unmappable_end; - int ret; + int ret, i; if (!intel_vgpu_active(dev_priv)) return 0; @@ -242,6 +242,9 @@ int intel_vgt_balloon(struct drm_i915_private *dev_priv) goto err; } + for (i = 0; i < ARRAY_SIZE(bl_info.space); i++) + ggtt->base.reserved += bl_info.space[i].size; + DRM_INFO("VGT balloon successfully\n"); return 0;