From patchwork Fri May 5 06:50:33 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Lee, Shawn C" X-Patchwork-Id: 9713077 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id B38A4602B9 for ; Fri, 5 May 2017 06:21:01 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A4C8E2869A for ; Fri, 5 May 2017 06:21:01 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 97DC6286B4; Fri, 5 May 2017 06:21:01 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 47EE52869A for ; Fri, 5 May 2017 06:21:00 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 897B76E5DE; Fri, 5 May 2017 06:21:00 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by gabe.freedesktop.org (Postfix) with ESMTPS id 194406E5DE for ; Fri, 5 May 2017 06:20:59 +0000 (UTC) Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 04 May 2017 23:20:58 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.38,291,1491289200"; d="scan'208";a="97550810" Received: from shawnle1-cm6330-cm6630-cm6730-cm6830-m11aa-8.itwn.intel.com ([10.5.230.22]) by fmsmga005.fm.intel.com with ESMTP; 04 May 2017 23:20:56 -0700 From: "Lee, Shawn C" To: intel-gfx@lists.freedesktop.org Date: Fri, 5 May 2017 14:50:33 +0800 Message-Id: <1493967033-11204-1-git-send-email-shawn.c.lee@intel.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1493303722-17024-1-git-send-email-shawn.c.lee@intel.com> References: <1493303722-17024-1-git-send-email-shawn.c.lee@intel.com> Cc: Cooper Chiou , Jim Bride , Jani Nikula , Rodrigo Vivi , Ryan Lin Subject: [Intel-gfx] [PATCH v3] drm/i915/edp: Read link status after exit link training X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP From: "Lee, Shawn C" Display driver read DPCD register 0x202, 0x203 and 0x204 to identify eDP sink status. If PSR exit and link trainign are ongoing at eDP sink. And eDP source read these registers at the same time. eDP sink will report EQ & symbol lock not done. Then caused eDP display flicking. So driver have to make sure PSR already at inactive state before read link status. Change log: v2: - Use intel_wait_for_register() to replace I915_READ(). v3: - Use to_i915() to retrieve drm_i915_private. - Remove loop and extend wait_for_register timeout value to 100ms. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99639 TEST=Reboot DUT and no flicking on local display at login screen Cc: Cooper Chiou Cc: Gary C Wang Cc: Jani Nikula Cc: Rodrigo Vivi Cc: Jim Bride Cc: Ryan Lin Cc: Tvrtko Ursulin Cc: Ville Syrjala Signed-off-by: Shawn Lee --- drivers/gpu/drm/i915/intel_dp.c | 31 ++++++++++++++++++++++++++----- 1 file changed, 26 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 08834f74d396..8be9fd2ef9e0 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -4252,19 +4252,32 @@ static void intel_dp_handle_test_request(struct intel_dp *intel_dp) } static void +intel_edp_wait_link_train_complete(struct intel_dp *intel_dp) +{ + struct drm_device *dev = intel_dp_to_dev(intel_dp); + struct drm_i915_private *dev_priv = to_i915(dev); + + if (!intel_wait_for_register(dev_priv, + EDP_PSR_STATUS_CTL, + (EDP_PSR_STATUS_SENDING_TP1 | + EDP_PSR_STATUS_SENDING_TP2_TP3 | + EDP_PSR_STATUS_SENDING_IDLE | + EDP_PSR_STATUS_AUX_SENDING), + 0, + 100)) + return; +} + +static void intel_dp_check_link_status(struct intel_dp *intel_dp) { struct intel_encoder *intel_encoder = &dp_to_dig_port(intel_dp)->base; struct drm_device *dev = intel_dp_to_dev(intel_dp); + struct drm_i915_private *dev_priv = to_i915(dev); u8 link_status[DP_LINK_STATUS_SIZE]; WARN_ON(!drm_modeset_is_locked(&dev->mode_config.connection_mutex)); - if (!intel_dp_get_link_status(intel_dp, link_status)) { - DRM_ERROR("Failed to get link status\n"); - return; - } - if (!intel_encoder->base.crtc) return; @@ -4278,6 +4291,14 @@ static void intel_dp_handle_test_request(struct intel_dp *intel_dp) if (!intel_dp_link_params_valid(intel_dp)) return; + if (is_edp(intel_dp) && dev_priv->psr.enabled) + intel_edp_wait_link_train_complete(intel_dp); + + if (!intel_dp_get_link_status(intel_dp, link_status)) { + DRM_ERROR("Failed to get link status\n"); + return; + } + /* Retrain if Channel EQ or CR not ok */ if (!drm_dp_channel_eq_ok(link_status, intel_dp->lane_count)) { DRM_DEBUG_KMS("%s: channel EQ not ok, retraining\n",