From patchwork Wed May 10 02:59:21 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Li, Weinan Z" X-Patchwork-Id: 9719159 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 942A560365 for ; Wed, 10 May 2017 03:05:51 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 850A828473 for ; Wed, 10 May 2017 03:05:51 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 78CD428497; Wed, 10 May 2017 03:05:51 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 06E0B28473 for ; Wed, 10 May 2017 03:05:50 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id CC48E89B0C; Wed, 10 May 2017 03:05:48 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by gabe.freedesktop.org (Postfix) with ESMTPS id E5EF189AE6; Wed, 10 May 2017 03:05:46 +0000 (UTC) Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 09 May 2017 20:05:45 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.38,317,1491289200"; d="scan'208";a="259262154" Received: from weinanli-build.sh.intel.com ([10.239.12.23]) by fmsmga004.fm.intel.com with ESMTP; 09 May 2017 20:05:43 -0700 From: Weinan Li To: intel-gfx@lists.freedesktop.org, intel-gvt-dev@lists.freedesktop.org Date: Wed, 10 May 2017 10:59:21 +0800 Message-Id: <1494385161-25662-1-git-send-email-weinan.z.li@intel.com> X-Mailer: git-send-email 1.9.1 Subject: [Intel-gfx] [PATCH v4] drm/i915/gvt: return the correct usable aperture size under gvt environment X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP I915_GEM_GET_APERTURE ioctl is used to probe aperture size from userspace. In gvt environment, each vm only use the ballooned part of aperture, so we should return the correct available aperture size exclude the reserved part by balloon. v2: add 'reserved' in struct i915_address_space to record the reserved size in ggtt. v3: remain aper_size as total, adjust aper_available_size exclude reserved and pinned. UMD driver need to adjust the max allocation size according to the available aperture size but not total size. KMD return the correct usable aperture size any time. v4: add onion teardown to balloon and deballoon to make sure the reserved stays correct. Code style refine. Cc: Chris Wilson Cc: Joonas Lahtinen Signed-off-by: Weinan Li --- drivers/gpu/drm/i915/i915_gem.c | 4 ++-- drivers/gpu/drm/i915/i915_gem_gtt.h | 1 + drivers/gpu/drm/i915/i915_vgpu.c | 8 +++++++- 3 files changed, 10 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 33fb11c..8d8d9c0 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -156,8 +156,8 @@ int i915_mutex_lock_interruptible(struct drm_device *dev) mutex_unlock(&dev->struct_mutex); args->aper_size = ggtt->base.total; - args->aper_available_size = args->aper_size - pinned; - + args->aper_available_size = args->aper_size - + ggtt->base.reserved - pinned; return 0; } diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h b/drivers/gpu/drm/i915/i915_gem_gtt.h index fb15684..da9aa9f 100644 --- a/drivers/gpu/drm/i915/i915_gem_gtt.h +++ b/drivers/gpu/drm/i915/i915_gem_gtt.h @@ -255,6 +255,7 @@ struct i915_address_space { struct drm_i915_file_private *file; struct list_head global_link; u64 total; /* size addr space maps (ex. 2GB for ggtt) */ + u64 reserved; /* size addr space reserved */ bool closed; diff --git a/drivers/gpu/drm/i915/i915_vgpu.c b/drivers/gpu/drm/i915/i915_vgpu.c index 4ab8a97..25bed9b 100644 --- a/drivers/gpu/drm/i915/i915_vgpu.c +++ b/drivers/gpu/drm/i915/i915_vgpu.c @@ -109,8 +109,10 @@ void intel_vgt_deballoon(struct drm_i915_private *dev_priv) DRM_DEBUG("VGT deballoon.\n"); for (i = 0; i < 4; i++) { - if (bl_info.space[i].allocated) + if (bl_info.space[i].allocated) { + dev_priv->ggtt.base.reserved -= bl_info.space[i].size; drm_mm_remove_node(&bl_info.space[i]); + } } memset(&bl_info, 0, sizeof(bl_info)); @@ -216,6 +218,7 @@ int intel_vgt_balloon(struct drm_i915_private *dev_priv) if (ret) goto err; + ggtt->base.reserved += bl_info.space[2].size; } if (unmappable_end < ggtt_end) { @@ -223,6 +226,7 @@ int intel_vgt_balloon(struct drm_i915_private *dev_priv) unmappable_end, ggtt_end); if (ret) goto err; + ggtt->base.reserved += bl_info.space[3].size; } /* Mappable graphic memory ballooning */ @@ -232,6 +236,7 @@ int intel_vgt_balloon(struct drm_i915_private *dev_priv) if (ret) goto err; + ggtt->base.reserved += bl_info.space[0].size; } if (mappable_end < ggtt->mappable_end) { @@ -240,6 +245,7 @@ int intel_vgt_balloon(struct drm_i915_private *dev_priv) if (ret) goto err; + ggtt->base.reserved += bl_info.space[1].size; } DRM_INFO("VGT balloon successfully\n");