From patchwork Tue May 30 12:13:42 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Sharma, Shashank" X-Patchwork-Id: 9754439 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id BD587602F0 for ; Tue, 30 May 2017 12:12:00 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id AF0DF28455 for ; Tue, 30 May 2017 12:12:00 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A328C2847A; Tue, 30 May 2017 12:12:00 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=unavailable version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 25FCF28455 for ; Tue, 30 May 2017 12:12:00 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id A07AD89E33; Tue, 30 May 2017 12:11:18 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTPS id 9183689DA9; Tue, 30 May 2017 12:10:48 +0000 (UTC) Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 30 May 2017 05:10:47 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos; i="5.38,418,1491289200"; d="scan'208"; a="1154430296" Received: from shashanks-linuxbox.iind.intel.com ([10.223.161.29]) by fmsmga001.fm.intel.com with ESMTP; 30 May 2017 05:10:44 -0700 From: Shashank Sharma To: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org Date: Tue, 30 May 2017 17:43:42 +0530 Message-Id: <1496146430-11430-4-git-send-email-shashank.sharma@intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1496146430-11430-1-git-send-email-shashank.sharma@intel.com> References: <1496146430-11430-1-git-send-email-shashank.sharma@intel.com> Cc: Jose Abreu Subject: [Intel-gfx] [PATCH v2 03/11] drm: parse ycbcr420 cmdb block X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP HDMI 2.0 spec adds support for ycbcr420 sub-sampled output. CEA-861-F adds two new blocks in EDID, to provide information about sink's support for ycbcr420 output. One of these new blocks is: ycbcr420cmdb(ycbcr 420 capability map data block). This gives information about video modes which can support ycbcr420 output mode also (along with RGB,YCBCR444/ 422 etc) This block contains a bitmap index of normal svd videomodes, which can support ycbcr420 output too. So if bit 0 from first vcb byte is set,first video mode in the svd list can support ycbcr420 output too. Bit 2 means second video mode from svd list can support ycbcr420 output too, and so on. This patch adds parsing and handling of ycbcr420-cmdb in the DRM layer. Cc: Ville Syrjala Cc: Jose Abreu Cc: Emil Velikov V2: Addressed Review comments from Emil: - Use 1ULL< 64 modes in capability map block. - Use y420cmdb in function names and macros while dealing with vcb to be aligned with spec. - Move the display information parsing block ahead of mode parsing blocks. Signed-off-by: Shashank Sharma --- drivers/gpu/drm/drm_edid.c | 118 ++++++++++++++++++++++++++++++++++++++++++-- include/drm/drm_connector.h | 12 +++++ 2 files changed, 127 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c index c3fa3a1..ce86528 100644 --- a/drivers/gpu/drm/drm_edid.c +++ b/drivers/gpu/drm/drm_edid.c @@ -2781,7 +2781,9 @@ add_detailed_modes(struct drm_connector *connector, struct edid *edid, #define VIDEO_BLOCK 0x02 #define VENDOR_BLOCK 0x03 #define SPEAKER_BLOCK 0x04 -#define VIDEO_CAPABILITY_BLOCK 0x07 +#define VIDEO_CAPABILITY_BLOCK 0x07 +#define VIDEO_DATA_BLOCK_420 0x0E +#define VIDEO_CAP_BLOCK_Y420CMDB 0x0F #define EDID_BASIC_AUDIO (1 << 6) #define EDID_CEA_YCRCB444 (1 << 5) #define EDID_CEA_YCRCB422 (1 << 4) @@ -3143,15 +3145,50 @@ drm_display_mode_from_vic_index(struct drm_connector *connector, return newmode; } +static void +drm_add_vcb_modes(struct drm_connector *connector, u8 vic) +{ + u32 *map; + u8 index = 0; + struct drm_hdmi_info *hdmi = &connector->display_info.hdmi; + + /* VICs are 1 to 127(107 defined till CEA-861-F) */ + vic &= 127; + + /* + * ycbcr420_vcb_modes is a fix position 128 bit bitmap. This indicates + * support for ycbcr420 output per VIC. Arrangement is bit[n] indicates + * if vic[n+1] supports ycbcr420 output. + * ycbcr420_vcb_modes[0] = |VIC=32 |VIC=31 |............|VIC=2 |VIC=1 | + * ycbcr420_vcb_modes[1] = |VIC=64 |VIC=63 |............|VIC=34|VIC=33| + * ycbcr420_vcb_modes[2] = |VIC=96 |VIC=95 |............|VIC=66|VIC=65| + * ycbcr420_vcb_modes[3] = |VIC=128|VIC=127|............|VIC=34|VIC=97| + */ + map = &(hdmi->ycbcr420_vcb_modes[(vic - 1) / 32]); + index = (vic - 1) % 32; + *map |= (1 << index); +} + static int do_cea_modes(struct drm_connector *connector, const u8 *db, u8 len) { int i, modes = 0; + struct drm_hdmi_info *hdmi = &connector->display_info.hdmi; + u64 hdmi_vcb_map = hdmi->ycbcr420_vcb_map; for (i = 0; i < len; i++) { struct drm_display_mode *mode; mode = drm_display_mode_from_vic_index(connector, db, len, i); if (mode) { + /* + * ycbcr420 capability block contains a bitmap which + * gives the index of such CEA modes in VDB, which can + * support ycbcr420 sampling output also. + * For example, if the bit 0 in bitmap is set, + * first mode in VDB can support ycbcr420 output too. + */ + if (hdmi_vcb_map & (1 << i)) + drm_add_vcb_modes(connector, db[i]); drm_mode_probed_add(connector, mode); modes++; } @@ -3427,6 +3464,12 @@ do_hdmi_vsdb_modes(struct drm_connector *connector, const u8 *db, u8 len, } static int +cea_db_extended_tag(const u8 *db) +{ + return db[1]; +} + +static int cea_db_payload_len(const u8 *db) { return db[0] & 0x1f; @@ -3487,9 +3530,70 @@ static bool cea_db_is_hdmi_forum_vsdb(const u8 *db) return oui == HDMI_FORUM_IEEE_OUI; } +static bool cea_db_is_y420cmdb(const u8 *db) +{ + u8 len = cea_db_payload_len(db); + + if (cea_db_tag(db) != VIDEO_CAPABILITY_BLOCK) + return false; + + if (!len) + return false; + + if (cea_db_extended_tag(db) != VIDEO_CAP_BLOCK_Y420CMDB) + return false; + + return true; +} + #define for_each_cea_db(cea, i, start, end) \ for ((i) = (start); (i) < (end) && (i) + cea_db_payload_len(&(cea)[(i)]) < (end); (i) += cea_db_payload_len(&(cea)[(i)]) + 1) +static void drm_parse_y420cmdb_bitmap(struct drm_connector *connector, + const u8 *db) +{ + struct drm_display_info *info = &connector->display_info; + struct drm_hdmi_info *hdmi = &info->hdmi; + u8 map_len = cea_db_payload_len(db) - 1; + u8 count; + u64 map = 0; + + if (!db) + return; + + if (map_len == 0) { + /* All CEA modes support ycbcr420 sampling also.*/ + hdmi->ycbcr420_vcb_map = U64_MAX; + info->color_formats |= DRM_COLOR_FORMAT_YCRCB420; + return; + } + + /* + * This map indicates which of the existing CEA block modes + * from VDB can support YCBCR420 output too. So if bit=0 is + * set, first mode from VDB can support YCBCR420 output too. + * We will parse and keep this map, before parsing VDB itself + * to avoid going through the same block again and again. + * + * Spec is not clear about max possible size of this block. + * Clamping max bitmap block size at 8 bytes. Every byte can + * address 8 CEA modes, in this way this map can address + * 8*8 = first 64 SVDs. + */ + if (WARN_ON_ONCE(map_len > 8)) + map_len = 8; + + for (count = 0; count < map_len; count++) + map |= (u64)db[2 + count] << (8 * count); + + if (map) { + DRM_DEBUG_KMS("Sink supports ycbcr 420\n"); + info->color_formats |= DRM_COLOR_FORMAT_YCRCB420; + } + + hdmi->ycbcr420_vcb_map = map; +} + static int add_cea_modes(struct drm_connector *connector, struct edid *edid) { @@ -4196,6 +4300,8 @@ static void drm_parse_cea_ext(struct drm_connector *connector, drm_parse_hdmi_vsdb_video(connector, db); if (cea_db_is_hdmi_forum_vsdb(db)) drm_parse_hdmi_forum_vsdb(connector, db); + if (cea_db_is_y420cmdb(db)) + drm_parse_y420cmdb_bitmap(connector, db); } } @@ -4430,6 +4536,13 @@ int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid) quirks = edid_get_quirks(edid); /* + * CEA-861-F adds ycbcr capability map block, for HDMI 2.0 sinks. + * To avoid multiple parsing of same block, lets get the sink info + * before parsing CEA modes. + */ + drm_add_display_info(connector, edid); + + /* * EDID spec says modes should be preferred in this order: * - preferred detailed mode * - other detailed modes from base block @@ -4450,14 +4563,13 @@ int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid) num_modes += add_cea_modes(connector, edid); num_modes += add_alternate_cea_modes(connector, edid); num_modes += add_displayid_detailed_modes(connector, edid); + if (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF) num_modes += add_inferred_modes(connector, edid); if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75)) edid_fixup_preferred(connector, quirks); - drm_add_display_info(connector, edid); - if (quirks & EDID_QUIRK_FORCE_6BPC) connector->display_info.bpc = 6; diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h index 2fe09c1..07b10ab 100644 --- a/include/drm/drm_connector.h +++ b/include/drm/drm_connector.h @@ -137,6 +137,17 @@ struct drm_scdc { struct drm_hdmi_info { /** @scdc: sink's scdc support and capabilities */ struct drm_scdc scdc; + + /** + * @ycbcr420_vcb_modes: bitmap of modes which can support ycbcr420 + * output also along with normal outputs. There are total 107 VICs + * defined by CEA-861-F spec, so the size is 128bits to map upto 128 + * VICs; + */ + u32 ycbcr420_vcb_modes[4]; + + /** @ycbcr420_vcb_map: bitmap of SVD index, to extraxt vcb modes */ + u64 ycbcr420_vcb_map; }; /** @@ -200,6 +211,7 @@ struct drm_display_info { #define DRM_COLOR_FORMAT_RGB444 (1<<0) #define DRM_COLOR_FORMAT_YCRCB444 (1<<1) #define DRM_COLOR_FORMAT_YCRCB422 (1<<2) +#define DRM_COLOR_FORMAT_YCRCB420 (1<<3) /** * @color_formats: HDMI Color formats, selects between RGB and YCrCb