@@ -87,6 +87,18 @@ static bool is_mmio_work(struct intel_flip_work *work)
DRM_FORMAT_VYUY,
};
+static const uint32_t skl_primary_formats_with_nv12[] = {
+ DRM_FORMAT_C8,
+ DRM_FORMAT_RGB565,
+ DRM_FORMAT_XRGB8888,
+ DRM_FORMAT_XBGR8888,
+ DRM_FORMAT_ARGB8888,
+ DRM_FORMAT_ABGR8888,
+ DRM_FORMAT_XRGB2101010,
+ DRM_FORMAT_XBGR2101010,
+ DRM_FORMAT_NV12,
+};
+
/* Cursor formats */
static const uint32_t intel_cursor_formats[] = {
DRM_FORMAT_ARGB8888,
@@ -13956,9 +13968,13 @@ void intel_plane_destroy(struct drm_plane *plane)
primary->check_plane = intel_check_primary_plane;
if (INTEL_GEN(dev_priv) >= 9) {
- intel_primary_formats = skl_primary_formats;
- num_formats = ARRAY_SIZE(skl_primary_formats);
-
+ if (pipe == PIPE_A || pipe == PIPE_B) {
+ intel_primary_formats = skl_primary_formats_with_nv12;
+ num_formats = ARRAY_SIZE(skl_primary_formats_with_nv12);
+ } else {
+ intel_primary_formats = skl_primary_formats;
+ num_formats = ARRAY_SIZE(skl_primary_formats);
+ }
primary->update_plane = skylake_update_primary_plane;
primary->disable_plane = skylake_disable_primary_plane;
} else if (INTEL_GEN(dev_priv) >= 4) {