From patchwork Fri Aug 4 00:52:41 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Jason Ekstrand X-Patchwork-Id: 9880195 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id DA2D660311 for ; Fri, 4 Aug 2017 00:52:50 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id CA2A128906 for ; Fri, 4 Aug 2017 00:52:50 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id BDE2C28979; Fri, 4 Aug 2017 00:52:50 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 7969628906 for ; Fri, 4 Aug 2017 00:52:49 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id ECE6B6E122; Fri, 4 Aug 2017 00:52:47 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-pf0-x241.google.com (mail-pf0-x241.google.com [IPv6:2607:f8b0:400e:c00::241]) by gabe.freedesktop.org (Postfix) with ESMTPS id DCD336E122 for ; Fri, 4 Aug 2017 00:52:46 +0000 (UTC) Received: by mail-pf0-x241.google.com with SMTP id t86so297254pfe.1 for ; Thu, 03 Aug 2017 17:52:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=jlekstrand-net.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=LNfslJP1dOPBbXKDDY1e8Yu69E4wGiqyDFganSLXXaU=; b=DPG4uPN+xni0pg3JxnYRkDD2cspOW7LBIQV1GoPamxs0/eZD5M2xDBxyberKLHgIq8 qsF3Q33syFR7LCklmdd23cwZ593v+roNE+zFCB+r8SPLdeI9US4jLA9caGLXOGcqPNwD rVlDYbXquSvu87LdxQlO/ti6ITIsA+b76geKWCjejCBF4CKLImsRzR3IqlV1tPNJyVf/ 3VLW+DGQiN7jyiSQwRRgyNnYfQNYDaVDaVq3EDklOWf8sUHKroIl0ztdob7pry40kvuZ Cfkg1koH59mDspKmzhd5GHM9jBd0MLcRQYtsYXlhKlxSvs3TfsqroDCxsvPmNdvtG38W tx8Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=LNfslJP1dOPBbXKDDY1e8Yu69E4wGiqyDFganSLXXaU=; b=o3gGWfAcXPgfsvW6SOzRRAps3ACAmfApAtyAJt31C7RmPiuSpfomMau9pErytM0FKm M8uVXg6js5VVubP8wlvevHOpEy5deRgF8jvMi583tWaoEMMl1h9PP2zCivJrhiDAaVTq oHdkYtMsMbSntCzitKg5U6EZvqWqWhg5i8sc0wdSi3+uQXL2gNFH3Z7LCkNN344RmbPe 1/gmZH88njO21gdDVgXBRceHn0jOWsFcLx07OeN9cOgdPsgkSOv4FLXit+X8L7HAipWQ xEwnsNM120JNK1UbpJPl/Ig6aiagjQNTKquCmZM0oISWsbquEhbY8AUYhJk0THYY5nnn 8Hhw== X-Gm-Message-State: AIVw111Szr3SyZdQXxBd7/ATDgJBaMB1thBuIceoVf6TZJLt6rpv74MK PrhJ3Ih71sEc+9jUma5GMQ== X-Received: by 10.99.106.201 with SMTP id f192mr611071pgc.124.1501807965971; Thu, 03 Aug 2017 17:52:45 -0700 (PDT) Received: from omlet.jf.intel.com ([2603:3004:29:46f0:dd37:76bd:cc10:f3d7]) by smtp.gmail.com with ESMTPSA id a6sm250343pfj.136.2017.08.03.17.52.44 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 03 Aug 2017 17:52:45 -0700 (PDT) From: Jason Ekstrand X-Google-Original-From: Jason Ekstrand To: intel-gfx@lists.freedesktop.org Date: Thu, 3 Aug 2017 17:52:41 -0700 Message-Id: <1501807961-23186-1-git-send-email-jason.ekstrand@intel.com> X-Mailer: git-send-email 2.5.0.400.gff86faf MIME-Version: 1.0 Cc: Jason Ekstrand , Daniel Vetter , Daniel Stone , Ben Widawsky Subject: [Intel-gfx] [PATCH] tests/kms_ccs: Fix the color/ccs surface generation X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Previously, the test used the old 64x64 convention that Ville introduced for CCS tiles and not the current 128x32 Y-tile convention. Also, the original scheme for generating the CCS data was over-complicated and didn't work correctly because it assumed you could cut the main surface at an arbitrary Y coordinate. While you clearly *can* do this (the hardware does), it's not a good idea for a generator in a test. The new scheme, introduced here, is entirely based on the relationship between cache-lines in the main surface and the CCS that's documented in the PRM. By keeping everything CCS cache-line aligned, our chances of generating correct data for an arbitrary-size surface are much higher. Signed-off-by: Jason Ekstrand Cc: Ville Syrjälä Cc: Ben Widawsky Cc: Daniel Stone Cc: Daniel Vetter Reviewed-by: Ben Widawsky --- tests/kms_ccs.c | 91 ++++++++++++++++++++++++++++++++++++++++----------------- 1 file changed, 65 insertions(+), 26 deletions(-) diff --git a/tests/kms_ccs.c b/tests/kms_ccs.c index 29d676a..ef952f2 100644 --- a/tests/kms_ccs.c +++ b/tests/kms_ccs.c @@ -48,12 +48,17 @@ typedef struct { #define COMPRESSED_GREEN 0x000ff00f #define COMPRESSED_BLUE 0x00000fff +#define CCS_UNCOMPRESSED 0x0 +#define CCS_COMPRESSED 0x55 + #define RED 0x00ff0000 -static void render_fb(data_t *data, bool compressed) +static void render_fb(data_t *data, bool compressed, + int height, unsigned int stride) { struct igt_fb *fb = &data->fb; uint32_t *ptr; + unsigned int half_height, half_size; int i; igt_assert(fb->fb_id); @@ -62,43 +67,63 @@ static void render_fb(data_t *data, bool compressed) 0, fb->size, PROT_READ | PROT_WRITE); - for (i = 0; i < fb->size / 4; i++) { - /* Fill upper half as compressed */ - if (compressed && i < fb->size / 4 / 2) - ptr[i] = COMPRESSED_RED; - else + if (compressed) { + /* In the compressed case, we want the top half of the + * surface to be uncompressed and the bottom half to be + * compressed. + * + * We need to cut the surface on a CCS cache-line boundary, + * otherwise, we're going to be in trouble when we try to + * generate CCS data for the surface. A cache line in the + * CCS is 16x16 cache-line-pairs in the main surface. 16 + * cache lines is 64 rows high. + */ + half_height = ALIGN(height, 128) / 2; + half_size = half_height * stride; + for (i = 0; i < fb->size / 4; i++) { + if (i < half_size / 4) + ptr[i] = RED; + else + ptr[i] = COMPRESSED_RED; + } + } else { + for (i = 0; i < fb->size / 4; i++) ptr[i] = RED; } munmap(ptr, fb->size); } -static uint8_t *ccs_ptr(uint8_t *ptr, - unsigned int x, unsigned int y, - unsigned int stride) +static unsigned int +y_tile_y_pos(unsigned int offset, unsigned int stride) { - return ptr + - ((y & ~0x3f) * stride) + - ((x & ~0x7) * 64) + - ((y & 0x3f) * 8) + - (x & 7); + unsigned int y_tiles, y; + y_tiles = (offset / 4096) / (stride / 128); + y = y_tiles * 32 + ((offset & 0x1f0) >> 4); + return y; } static void render_ccs(data_t *data, uint32_t gem_handle, uint32_t offset, uint32_t size, - int w, int h, unsigned int stride) + int height, unsigned int ccs_stride) { + unsigned int half_height, ccs_half_height; uint8_t *ptr; - int x, y; + int i; + + half_height = ALIGN(height, 128) / 2; + ccs_half_height = half_height / 16; ptr = gem_mmap__cpu(data->drm_fd, gem_handle, offset, size, PROT_READ | PROT_WRITE); - /* Mark upper half as compressed */ - for (x = 0 ; x < w; x++) - for (y = 0 ; y <= h / 2; y++) - *ccs_ptr(ptr, x, y, stride) = 0x55; + for (i = 0; i < size; i++) { + if (y_tile_y_pos(i, ccs_stride) < ccs_half_height) + ptr[i] = CCS_UNCOMPRESSED; + else + ptr[i] = CCS_COMPRESSED; + } munmap(ptr, size); } @@ -143,12 +168,26 @@ static void display_fb(data_t *data, int compressed) size[0] = f.pitches[0] * ALIGN(height, 32); if (compressed) { - width = ALIGN(f.width, 16) / 16; - height = ALIGN(f.height, 8) / 8; - f.pitches[1] = ALIGN(width * 1, 64); + /* From the Sky Lake PRM, Vol 12, "Color Control Surface": + * + * "The compression state of the cache-line pair is + * specified by 2 bits in the CCS. Each CCS cache-line + * represents an area on the main surface of 16x16 sets + * of 128 byte Y-tiled cache-line-pairs. CCS is always Y + * tiled." + * + * A "cache-line-pair" for a Y-tiled surface is two + * horizontally adjacent cache lines. When operating in + * bytes and rows, this gives us a scale-down factor of + * 32x16. Since the main surface has a 32-bit format, we + * need to multiply width by 4 to get bytes. + */ + width = ALIGN(f.width * 4, 32) / 32; + height = ALIGN(f.height, 16) / 16; + f.pitches[1] = ALIGN(width * 1, 128); f.modifier[1] = modifier; f.offsets[1] = size[0]; - size[1] = f.pitches[1] * ALIGN(height, 64); + size[1] = f.pitches[1] * ALIGN(height, 32); f.handles[0] = gem_create(data->drm_fd, size[0] + size[1]); f.handles[1] = f.handles[0]; @@ -176,11 +215,11 @@ static void display_fb(data_t *data, int compressed) fb->cairo_surface = NULL; fb->domain = 0; - render_fb(data, compressed); + render_fb(data, compressed, f.height, f.pitches[0]); if (compressed) render_ccs(data, f.handles[0], f.offsets[1], size[1], - f.width/16, f.height/8, f.pitches[1]); + f.height, f.pitches[1]); primary = igt_output_get_plane_type(data->output, DRM_PLANE_TYPE_PRIMARY); igt_plane_set_fb(primary, fb);