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[5/6] drm/i915: Add NV12 as supported format for sprite plane

Message ID 1503917542-15009-6-git-send-email-vidya.srinivas@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Vidya Srinivas Aug. 28, 2017, 10:52 a.m. UTC 
From: Chandra Konduru <chandra.konduru@intel.com>

This patch adds NV12 to list of supported formats for sprite plane.

v2: Rebased (me)

v3: Review comments by Ville addressed
	- Removed skl_plane_formats_with_nv12 and added
	NV12 case in existing skl_plane_formats
	- Added the 10bpc RGB formats

v4: Addressed review comments from Clinton A Taylor
	"Why are we adding 10 bit RGB formats with the NV12 series patches?
	Trying to set XR30 or AB30 results in error returned even though
	the modes are advertised for the planes"
	- Removed 10bit RGB formats added previously with NV12 series

v5: Missed the Tested-by/Reviewed-by in the previous series
	Adding the same to commit message in this version.
	Addressed review comments from Clinton A Taylor
	"Why are we adding 10 bit RGB formats with the NV12 series patches?
	Trying to set XR30 or AB30 results in error returned even though
	the modes are advertised for the planes"
	- Previous version has 10bit RGB format removed from VLV formats
	by mistake. Fixing that in this version.
	Removed 10bit RGB formats added previously with NV12 series
	for SKL.

v6: Addressed review comments by Ville
	Restricting the NV12 to BXT and PIPE A and B

v7: Rebased (me)

Tested-by: Clinton Taylor <clinton.a.taylor@intel.com>
Reviewed-by: Clinton Taylor <clinton.a.taylor@intel.com>
Signed-off-by: Chandra Konduru <chandra.konduru@intel.com>
Signed-off-by: Nabendu Maiti <nabendu.bikash.maiti@intel.com>
Signed-off-by: Vidya Srinivas <vidya.srinivas@intel.com>
---
 drivers/gpu/drm/i915/intel_sprite.c | 24 +++++++++++++++++++++---
 1 file changed, 21 insertions(+), 3 deletions(-)
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
index 47e5ba9..5b49e4e 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -1197,6 +1197,19 @@  static bool intel_sprite_plane_format_mod_supported(struct drm_plane *plane,
         .format_mod_supported = intel_sprite_plane_format_mod_supported,
 };
 
+static uint32_t nv12_plane_formats[] = {
+	DRM_FORMAT_RGB565,
+	DRM_FORMAT_ABGR8888,
+	DRM_FORMAT_ARGB8888,
+	DRM_FORMAT_XBGR8888,
+	DRM_FORMAT_XRGB8888,
+	DRM_FORMAT_YUYV,
+	DRM_FORMAT_YVYU,
+	DRM_FORMAT_UYVY,
+	DRM_FORMAT_VYUY,
+	DRM_FORMAT_NV12,
+};
+
 struct intel_plane *
 intel_sprite_plane_create(struct drm_i915_private *dev_priv,
 			  enum pipe pipe, int plane)
@@ -1239,9 +1252,14 @@  struct intel_plane *
 
 		intel_plane->update_plane = skl_update_plane;
 		intel_plane->disable_plane = skl_disable_plane;
-
-		plane_formats = skl_plane_formats;
-		num_plane_formats = ARRAY_SIZE(skl_plane_formats);
+		if (IS_BROXTON(dev_priv) &&
+			(pipe == PIPE_A || pipe == PIPE_B)) {
+			plane_formats = nv12_plane_formats;
+			num_plane_formats = ARRAY_SIZE(nv12_plane_formats);
+		} else {
+			plane_formats = skl_plane_formats;
+			num_plane_formats = ARRAY_SIZE(skl_plane_formats);
+		}
 		modifiers = skl_plane_format_modifiers;
 	} else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
 		intel_plane->can_scale = false;