From patchwork Thu Sep 7 10:06:07 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: sagar.a.kamble@intel.com X-Patchwork-Id: 9941985 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 31CF6604D5 for ; Thu, 7 Sep 2017 10:03:08 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 433EB28600 for ; Thu, 7 Sep 2017 10:03:08 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 381D128607; Thu, 7 Sep 2017 10:03:08 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id A6DBC28606 for ; Thu, 7 Sep 2017 10:03:07 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id DED7F6E8DA; Thu, 7 Sep 2017 10:03:06 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTPS id 22CF26E8D3 for ; Thu, 7 Sep 2017 10:03:05 +0000 (UTC) Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 07 Sep 2017 03:03:05 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.42,357,1500966000"; d="scan'208";a="126439735" Received: from sakamble-desktop.iind.intel.com ([10.223.26.118]) by orsmga004.jf.intel.com with ESMTP; 07 Sep 2017 03:03:03 -0700 From: Sagar Arun Kamble To: intel-gfx@lists.freedesktop.org Date: Thu, 7 Sep 2017 15:36:07 +0530 Message-Id: <1504778774-18117-8-git-send-email-sagar.a.kamble@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1504778774-18117-1-git-send-email-sagar.a.kamble@intel.com> References: <1504778774-18117-1-git-send-email-sagar.a.kamble@intel.com> Cc: Sourab Gupta Subject: [Intel-gfx] [PATCH 07/14] drm/i915: Populate ctx ID for periodic OA reports X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP From: Sourab Gupta This adds support for populating the ctx id for the periodic OA reports when requested through the corresponding property. For Gen8, the OA reports itself have the ctx ID and it is the one programmed into HW while submitting workloads. Thus it's retrieved from reports itself. For Gen7, the OA reports don't have any such field, and we can populate this field with the last seen ctx ID while sending CS reports. v2: Updated last_ctx_id for stream based on the id of perf sample as the periodic OA reports after the request gets completed should not be associated with any context. Signed-off-by: Sourab Gupta Signed-off-by: Sagar Arun Kamble --- drivers/gpu/drm/i915/i915_drv.h | 8 +++++ drivers/gpu/drm/i915/i915_perf.c | 68 +++++++++++++++++++++++++++++++++------- 2 files changed, 64 insertions(+), 12 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index db2505f..a72ba20 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -2127,6 +2127,8 @@ struct i915_perf_stream { struct list_head cs_samples; struct list_head free_samples; spinlock_t samples_lock; + + u32 last_ctx_id; }; /** @@ -2213,6 +2215,12 @@ struct i915_oa_ops { * generations. */ u32 (*oa_hw_tail_read)(struct drm_i915_private *dev_priv); + + /** + * @get_ctx_id: Retrieve the ctx_id associated with the (periodic) OA + * report. + */ + u32 (*get_ctx_id)(struct i915_perf_stream *stream, const u8 *report); }; enum request_sample_id { diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c index 7664c5b..c3c2674 100644 --- a/drivers/gpu/drm/i915/i915_perf.c +++ b/drivers/gpu/drm/i915/i915_perf.c @@ -809,6 +809,45 @@ static u32 oa_buffer_num_reports_unlocked( return aged_tail == INVALID_TAIL_PTR ? 0 : num_reports; } +static u32 gen7_oa_buffer_get_ctx_id(struct i915_perf_stream *stream, + const u8 *report) +{ + if (!stream->cs_mode) + WARN_ONCE(1, + "CTX ID can't be retrieved if command stream mode not enabled"); + + /* + * OA reports generated in Gen7 don't have the ctx ID information. + * Therefore, just rely on the ctx ID information from the last CS + * sample forwarded + */ + return stream->last_ctx_id; +} + +static u32 gen8_oa_buffer_get_ctx_id(struct i915_perf_stream *stream, + const u8 *report) +{ + u32 ctx_id; + + /* The ctx ID present in the OA reports have intel_context::hw_id + * present, since this is programmed into the ELSP in execlist mode. + * In non-execlist mode, fall back to retrieving the ctx ID from the + * last saved ctx ID from command stream mode. + */ + if (i915.enable_execlists) { + u32 *report32 = (void *)report; + + ctx_id = report32[2] & 0x1fffff; + } else { + if (!stream->cs_mode) + WARN_ONCE(1, + "CTX ID can't be retrieved if command stream mode not enabled"); + + ctx_id = stream->last_ctx_id; + } + return ctx_id; +} + /** * append_oa_status - Appends a status record to a userspace read() buffer. * @stream: An i915-perf stream opened for OA metrics @@ -933,22 +972,12 @@ static int append_oa_buffer_sample(struct i915_perf_stream *stream, struct drm_i915_private *dev_priv = stream->dev_priv; u32 sample_flags = stream->sample_flags; struct i915_perf_sample_data data = { 0 }; - u32 *report32 = (u32 *)report; if (sample_flags & SAMPLE_OA_SOURCE) data.source = I915_PERF_SAMPLE_OA_SOURCE_OABUFFER; if (sample_flags & SAMPLE_CTX_ID) { - if (INTEL_INFO(dev_priv)->gen < 8) - data.ctx_id = 0; - else { - /* - * XXX: Just keep the lower 21 bits for now since I'm - * not entirely sure if the HW touches any of the higher - * bits in this field - */ - data.ctx_id = report32[2] & 0x1fffff; - } + data.ctx_id = dev_priv->perf.oa.ops.get_ctx_id(stream, report); } if (sample_flags & SAMPLE_OA_REPORT) @@ -1543,8 +1572,21 @@ static int append_cs_buffer_sample(struct i915_perf_stream *stream, if (sample_flags & SAMPLE_OA_SOURCE) data.source = I915_PERF_SAMPLE_OA_SOURCE_CS; - if (sample_flags & SAMPLE_CTX_ID) + if (sample_flags & SAMPLE_CTX_ID) { data.ctx_id = node->ctx_id; + /* + * If this sample corresponds to perf data prior to start of + * request then cache the CTX ID for associating with later OA + * reports. If this corresponds to perf data at the end of + * request then mark stream's last_ctx_id as INVALID_CTX_ID as + * there will not be a context to be associated with the OA + * reports till new request is submitted. + */ + if (node->id == PRE_REQUEST_SAMPLE_ID) + stream->last_ctx_id = data.ctx_id; + else + stream->last_ctx_id = INVALID_CTX_ID; + } return append_perf_sample(stream, buf, count, offset, &data); } @@ -4281,6 +4323,7 @@ void i915_perf_init(struct drm_i915_private *dev_priv) dev_priv->perf.oa.ops.read = gen7_oa_read; dev_priv->perf.oa.ops.oa_hw_tail_read = gen7_oa_hw_tail_read; + dev_priv->perf.oa.ops.get_ctx_id = gen7_oa_buffer_get_ctx_id; dev_priv->perf.oa.timestamp_frequency = 12500000; @@ -4306,6 +4349,7 @@ void i915_perf_init(struct drm_i915_private *dev_priv) dev_priv->perf.oa.ops.oa_disable = gen8_oa_disable; dev_priv->perf.oa.ops.read = gen8_oa_read; dev_priv->perf.oa.ops.oa_hw_tail_read = gen8_oa_hw_tail_read; + dev_priv->perf.oa.ops.get_ctx_id = gen8_oa_buffer_get_ctx_id; dev_priv->perf.oa.oa_formats = gen8_plus_oa_formats;