diff --git a/tests/intel_perf_dapc.c b/tests/intel_perf_dapc.c
index 7a6effa..8644505 100644
--- a/tests/intel_perf_dapc.c
+++ b/tests/intel_perf_dapc.c
@@ -127,6 +127,12 @@ enum {
 	local_I915_PERF_SAMPLE_OA_SOURCE_MAX	/* non-ABI */
 };
 
+#define local_I915_PERF_MMIO_NUM_MAX	8
+struct local_drm_i915_perf_mmio_list {
+	__u32 num_mmio;
+	__u32 mmio_list[local_I915_PERF_MMIO_NUM_MAX];
+};
+
 enum {
 	local_DRM_I915_PERF_PROP_SAMPLE_OA_SOURCE = DRM_I915_PERF_PROP_OA_EXPONENT + 1,
 	local_DRM_I915_PERF_PROP_ENGINE = DRM_I915_PERF_PROP_OA_EXPONENT + 2,
@@ -1163,6 +1169,260 @@ test_perf_ts(void)
 	igt_waitchildren();
 }
 
+static char *
+read_debugfs_record(int device, const char *file, const char *key)
+{
+	FILE *fp;
+	int fd;
+	char *line = NULL;
+	size_t line_buf_size = 0;
+	int len = 0;
+	int key_len = strlen(key);
+	char *value = NULL;
+
+	fd = igt_debugfs_open(device, file, O_RDONLY);
+	fp = fdopen(fd, "r");
+	igt_require(fp);
+
+	while ((len = getline(&line, &line_buf_size, fp)) > 0) {
+
+		if (line[len - 1] == '\n')
+			line[len - 1] = '\0';
+
+		if (strncmp(key, line, key_len) == 0 &&
+		    line[key_len] == ':' &&
+		    line[key_len + 1] == ' ') {
+			value = strdup(line + key_len + 2);
+			goto done;
+		}
+	}
+
+	igt_assert(!"reached");
+done:
+	free(line);
+	fclose(fp);
+	close(fd);
+	return value;
+}
+
+static uint64_t
+read_debugfs_u64_record(int fd, const char *file, const char *key)
+{
+	char *str_val = read_debugfs_record(fd, file, key);
+	uint64_t val;
+
+	igt_require(str_val);
+
+	val = strtoull(str_val, NULL, 0);
+	free(str_val);
+
+	return val;
+}
+
+struct oa_mmio_sample {
+	uint32_t mmio[2];
+	uint8_t oa_report[];
+};
+
+static void
+verify_oa_mmio(uint8_t *perf_reports, int num_reports, size_t report_size,
+	       uint64_t *pre_mmio_residency, uint64_t *post_mmio_residency)
+{
+	struct oa_mmio_sample *sample;
+	uint32_t *oa_report;
+
+	igt_debug("pre rc6 residency = %lu, rc6p residency = %lu, "
+		  "post rc6 residency = %lu, rc6p residency = %lu\n",
+		  pre_mmio_residency[0], pre_mmio_residency[1],
+		  post_mmio_residency[0], post_mmio_residency[1]);
+
+	for (int i = 0; i < num_reports; i++) {
+		size_t offset = i * report_size;
+
+		sample = (struct oa_mmio_sample *) (perf_reports + offset);
+		oa_report = (uint32_t *) sample->oa_report;
+
+		igt_debug("read mmio: rc6 = %u, rc6p = %u\n",
+			  sample->mmio[0], sample->mmio[1]);
+
+		igt_debug("read report: reason = %x, timestamp = %x\n",
+			  oa_report[0], oa_report[1]);
+
+		if (!oa_report[0]) {
+			igt_assert(sample->mmio[0] >= pre_mmio_residency[0]);
+			igt_assert(sample->mmio[1] >= pre_mmio_residency[1]);
+			igt_assert(sample->mmio[0] <= post_mmio_residency[0]);
+			igt_assert(sample->mmio[1] <= post_mmio_residency[1]);
+		}
+	}
+}
+
+static void
+test_perf_oa_mmio(void)
+{
+	uint64_t properties[] = {
+		/* Include OA reports in samples */
+		DRM_I915_PERF_PROP_SAMPLE_OA, true,
+
+		/* OA unit configuration */
+		DRM_I915_PERF_PROP_OA_METRICS_SET, test_metric_set_id,
+		DRM_I915_PERF_PROP_OA_FORMAT, test_oa_format,
+		DRM_I915_PERF_PROP_OA_EXPONENT, oa_exp_1_millisec,
+
+		/* CS parameters */
+		local_DRM_I915_PERF_PROP_ENGINE, I915_EXEC_RENDER,
+		local_DRM_I915_PERF_PROP_SAMPLE_MMIO, 0,
+	};
+	struct drm_i915_perf_open_param param = {
+		.flags = I915_PERF_FLAG_FD_CLOEXEC,
+		.num_properties = sizeof(properties) / 16,
+		.properties_ptr = to_user_pointer(properties),
+	};
+	struct local_drm_i915_perf_mmio_list mmio;
+
+	memset(&mmio, 0, sizeof(mmio));
+
+#define GEN6_GT_GFX_RC6				0x138108
+#define GEN6_GT_GFX_RC6p			0x13810C
+	mmio.mmio_list[0] = GEN6_GT_GFX_RC6;
+	mmio.mmio_list[1] = GEN6_GT_GFX_RC6p;
+	mmio.num_mmio = 2;
+
+	properties[ARRAY_SIZE(properties) - 1] = (uint64_t)&mmio;
+
+	/* should be default, but just to be sure... */
+	write_u64_file("/proc/sys/dev/i915/perf_stream_paranoid", 1);
+
+	igt_fork(child, 1) {
+		int prop_size = ARRAY_SIZE(properties);
+		int num_reports = 10;
+		int report_size = get_perf_report_size(properties, prop_size,
+						       test_oa_format);
+		int total_size = num_reports * report_size;
+		uint8_t *perf_reports = malloc(total_size);
+		uint64_t pre_mmio_residency[2], post_mmio_residency[2];
+
+		igt_assert(perf_reports);
+
+		pre_mmio_residency[0] = read_debugfs_u64_record(drm_fd,
+						"i915_drpc_info",
+						"RC6 residency since boot");
+		pre_mmio_residency[1] = read_debugfs_u64_record(drm_fd,
+						"i915_drpc_info",
+						"RC6+ residency since boot");
+		perf_stream_capture_workload_samples(&param, perf_reports,
+						     num_reports, report_size,
+						     NULL);
+		post_mmio_residency[0] = read_debugfs_u64_record(drm_fd,
+						"i915_drpc_info",
+						"RC6 residency since boot");
+		post_mmio_residency[1] = read_debugfs_u64_record(drm_fd,
+						"i915_drpc_info",
+						"RC6+ residency since boot");
+		verify_oa_mmio(perf_reports, num_reports, report_size,
+			       pre_mmio_residency, post_mmio_residency);
+		free(perf_reports);
+	}
+
+	igt_waitchildren();
+}
+
+struct ts_mmio_sample {
+	uint64_t ts;
+	uint32_t mmio[2];
+};
+
+static void
+verify_ts_mmio(uint8_t *perf_reports, int num_reports, size_t report_size,
+	       uint64_t *pre_mmio_residency, uint64_t *post_mmio_residency)
+{
+	struct ts_mmio_sample *sample;
+
+	igt_debug("pre rc6 residency = %lu, rc6p residency = %lu, "
+		  "post rc6 residency = %lu, rc6p residency = %lu\n",
+		  pre_mmio_residency[0], pre_mmio_residency[1],
+		  post_mmio_residency[0], post_mmio_residency[1]);
+
+	for (int i = 0; i < num_reports; i++) {
+		size_t offset = i * report_size;
+
+		sample = (struct ts_mmio_sample *) (perf_reports + offset);
+
+		igt_debug("read mmio: rc6 = %u, rc6p = %u\n",
+			  sample->mmio[0], sample->mmio[1]);
+
+		igt_debug("read report: timestamp = %lu\n", sample->ts);
+
+		igt_assert(sample->mmio[0] >= pre_mmio_residency[0]);
+		igt_assert(sample->mmio[1] >= pre_mmio_residency[1]);
+		igt_assert(sample->mmio[0] <= post_mmio_residency[0]);
+		igt_assert(sample->mmio[1] <= post_mmio_residency[1]);
+	}
+}
+
+static void
+test_perf_ts_mmio(void)
+{
+	uint64_t properties[] = {
+		/* CS parameters */
+		local_DRM_I915_PERF_PROP_ENGINE, I915_EXEC_RENDER,
+		local_DRM_I915_PERF_PROP_SAMPLE_TS, true,
+		local_DRM_I915_PERF_PROP_SAMPLE_MMIO, 0,
+	};
+	struct drm_i915_perf_open_param param = {
+		.flags = I915_PERF_FLAG_FD_CLOEXEC,
+		.num_properties = sizeof(properties) / 16,
+		.properties_ptr = to_user_pointer(properties),
+	};
+	struct local_drm_i915_perf_mmio_list mmio;
+
+	memset(&mmio, 0, sizeof(mmio));
+
+#define GEN6_GT_GFX_RC6				0x138108
+#define GEN6_GT_GFX_RC6p			0x13810C
+	mmio.mmio_list[0] = GEN6_GT_GFX_RC6;
+	mmio.mmio_list[1] = GEN6_GT_GFX_RC6p;
+	mmio.num_mmio = 2;
+
+	properties[ARRAY_SIZE(properties) - 1] = (uint64_t)&mmio;
+
+	/* should be default, but just to be sure... */
+	write_u64_file("/proc/sys/dev/i915/perf_stream_paranoid", 1);
+
+	igt_fork(child, 1) {
+		int prop_size = ARRAY_SIZE(properties);
+		int num_reports = 2;
+		int report_size = get_perf_report_size_nonoa(properties,
+							     prop_size);
+		int total_size = num_reports * report_size;
+		uint8_t *perf_reports = malloc(total_size);
+		uint64_t pre_mmio_residency[2], post_mmio_residency[2];
+
+		igt_assert(perf_reports);
+
+		pre_mmio_residency[0] = read_debugfs_u64_record(drm_fd,
+						"i915_drpc_info",
+						"RC6 residency since boot");
+		pre_mmio_residency[1] = read_debugfs_u64_record(drm_fd,
+						"i915_drpc_info",
+						"RC6+ residency since boot");
+		perf_stream_capture_workload_samples(&param, perf_reports,
+						     num_reports, report_size,
+						     NULL);
+		post_mmio_residency[0] = read_debugfs_u64_record(drm_fd,
+						"i915_drpc_info",
+						"RC6 residency since boot");
+		post_mmio_residency[1] = read_debugfs_u64_record(drm_fd,
+						"i915_drpc_info",
+						"RC6+ residency since boot");
+		verify_ts_mmio(perf_reports, num_reports, report_size,
+			       pre_mmio_residency, post_mmio_residency);
+		free(perf_reports);
+	}
+
+	igt_waitchildren();
+}
+
 igt_main
 {
 	igt_skip_on_simulation();
@@ -1196,6 +1456,12 @@ igt_main
 	igt_subtest("perf-ts")
 		test_perf_ts();
 
+	igt_subtest("perf-mmio") {
+		igt_require(intel_get_device_info(devid)->gen >= 9);
+		test_perf_ts_mmio();
+		test_perf_oa_mmio();
+	}
+
 	igt_fixture {
 		close(drm_fd);
 	}
