From patchwork Thu Sep 14 09:55:04 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: sagar.a.kamble@intel.com X-Patchwork-Id: 9952661 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 3D5B260317 for ; Thu, 14 Sep 2017 09:51:52 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 25EF528E2B for ; Thu, 14 Sep 2017 09:51:52 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 1B0D528E92; Thu, 14 Sep 2017 09:51:52 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 3D4BB28E4A for ; Thu, 14 Sep 2017 09:51:51 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id AE1B16E9D6; Thu, 14 Sep 2017 09:51:50 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by gabe.freedesktop.org (Postfix) with ESMTPS id D9C3A6E9D6 for ; Thu, 14 Sep 2017 09:51:47 +0000 (UTC) Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 14 Sep 2017 02:51:47 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.42,392,1500966000"; d="scan'208";a="311578623" Received: from sakamble-desktop.iind.intel.com ([10.223.26.118]) by fmsmga004.fm.intel.com with ESMTP; 14 Sep 2017 02:51:46 -0700 From: Sagar Arun Kamble To: intel-gfx@lists.freedesktop.org Date: Thu, 14 Sep 2017 15:25:04 +0530 Message-Id: <1505382908-6844-3-git-send-email-sagar.a.kamble@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1505382908-6844-1-git-send-email-sagar.a.kamble@intel.com> References: <1505382908-6844-1-git-send-email-sagar.a.kamble@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 2/6] drm/i915/guc: Make guc_enable/disable_communication functions public X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP From: "Kamble, Sagar A" This patch is moving guc_enable_communication and guc_disable_communication to intel_guc.c and making it available for use through intel_guc.h. Intent is to reuse this function for calling from intel_uc_init_hw and also as part of intel_uc_fini_hw where it will be coupled with other teardown related to GuC in the upcoming patch. Cc: Michal Wajdeczko Cc: Michał Winiarski Signed-off-by: Sagar Arun Kamble --- drivers/gpu/drm/i915/intel_guc.c | 21 +++++++++++++++++++++ drivers/gpu/drm/i915/intel_guc.h | 2 ++ drivers/gpu/drm/i915/intel_uc.c | 29 ++++------------------------- 3 files changed, 27 insertions(+), 25 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_guc.c b/drivers/gpu/drm/i915/intel_guc.c index 5559e00..75bb830 100644 --- a/drivers/gpu/drm/i915/intel_guc.c +++ b/drivers/gpu/drm/i915/intel_guc.c @@ -181,3 +181,24 @@ void intel_guc_auth_huc(struct intel_guc *guc, struct intel_huc *huc) out: i915_vma_unpin(vma); } + +int intel_guc_enable_communication(struct intel_guc *guc) +{ + struct drm_i915_private *dev_priv = guc_to_i915(guc); + + if (HAS_GUC_CT(dev_priv)) + return intel_guc_enable_ct(guc); + + guc->send = intel_guc_send_mmio; + return 0; +} + +void intel_guc_disable_communication(struct intel_guc *guc) +{ + struct drm_i915_private *dev_priv = guc_to_i915(guc); + + if (HAS_GUC_CT(dev_priv)) + intel_guc_disable_ct(guc); + + guc->send = intel_guc_send_nop; +} diff --git a/drivers/gpu/drm/i915/intel_guc.h b/drivers/gpu/drm/i915/intel_guc.h index 9a282aa..8ed0e81 100644 --- a/drivers/gpu/drm/i915/intel_guc.h +++ b/drivers/gpu/drm/i915/intel_guc.h @@ -149,6 +149,8 @@ static inline u32 guc_ggtt_offset(struct i915_vma *vma) int intel_guc_send_nop(struct intel_guc *guc, const u32 *action, u32 len); int intel_guc_send_mmio(struct intel_guc *guc, const u32 *action, u32 len); void intel_guc_auth_huc(struct intel_guc *guc, struct intel_huc *huc); +int intel_guc_enable_communication(struct intel_guc *guc); +void intel_guc_disable_communication(struct intel_guc *guc); /* intel_guc_loader.c */ int intel_guc_select_fw(struct intel_guc *guc); diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c index a3fc4c8..30c004c 100644 --- a/drivers/gpu/drm/i915/intel_uc.c +++ b/drivers/gpu/drm/i915/intel_uc.c @@ -265,27 +265,6 @@ static void guc_free_load_err_log(struct intel_guc *guc) i915_gem_object_put(guc->load_err_log); } -static int guc_enable_communication(struct intel_guc *guc) -{ - struct drm_i915_private *dev_priv = guc_to_i915(guc); - - if (HAS_GUC_CT(dev_priv)) - return intel_guc_enable_ct(guc); - - guc->send = intel_guc_send_mmio; - return 0; -} - -static void guc_disable_communication(struct intel_guc *guc) -{ - struct drm_i915_private *dev_priv = guc_to_i915(guc); - - if (HAS_GUC_CT(dev_priv)) - intel_guc_disable_ct(guc); - - guc->send = intel_guc_send_nop; -} - int intel_uc_init_hw(struct drm_i915_private *dev_priv) { struct intel_guc *guc = &dev_priv->guc; @@ -295,7 +274,7 @@ int intel_uc_init_hw(struct drm_i915_private *dev_priv) if (!i915.enable_guc_loading) return 0; - guc_disable_communication(guc); + intel_guc_disable_communication(guc); gen9_reset_guc_interrupts(dev_priv); /* We need to notify the guc whenever we change the GGTT */ @@ -347,7 +326,7 @@ int intel_uc_init_hw(struct drm_i915_private *dev_priv) intel_guc_init_send_regs(guc); - ret = guc_enable_communication(guc); + ret = intel_guc_enable_communication(guc); if (ret) goto err_log_capture; @@ -373,7 +352,7 @@ int intel_uc_init_hw(struct drm_i915_private *dev_priv) * marks the GPU as wedged until reset). */ err_interrupts: - guc_disable_communication(guc); + intel_guc_disable_communication(guc); gen9_disable_guc_interrupts(dev_priv); err_log_capture: guc_capture_load_err_log(guc); @@ -410,7 +389,7 @@ void intel_uc_fini_hw(struct drm_i915_private *dev_priv) if (i915.enable_guc_submission) i915_guc_submission_disable(dev_priv); - guc_disable_communication(&dev_priv->guc); + intel_guc_disable_communication(&dev_priv->guc); if (i915.enable_guc_submission) { gen9_disable_guc_interrupts(dev_priv);