From patchwork Tue Sep 19 17:27:51 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: sagar.a.kamble@intel.com X-Patchwork-Id: 9959763 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 5CC8960568 for ; Tue, 19 Sep 2017 17:25:02 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 44B8928ED5 for ; Tue, 19 Sep 2017 17:25:02 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 392CD28EDA; Tue, 19 Sep 2017 17:25:02 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id CD62628ED9 for ; Tue, 19 Sep 2017 17:25:01 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 0DBE46E623; Tue, 19 Sep 2017 17:25:00 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by gabe.freedesktop.org (Postfix) with ESMTPS id 6081A6E61E for ; Tue, 19 Sep 2017 17:24:57 +0000 (UTC) Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga105.jf.intel.com with ESMTP; 19 Sep 2017 10:24:57 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos; i="5.42,418,1500966000"; d="scan'208"; a="1173839694" Received: from sakamble-desktop.iind.intel.com ([10.223.26.118]) by orsmga001.jf.intel.com with ESMTP; 19 Sep 2017 10:24:55 -0700 From: Sagar Arun Kamble To: intel-gfx@lists.freedesktop.org Date: Tue, 19 Sep 2017 22:57:51 +0530 Message-Id: <1505842071-12787-15-git-send-email-sagar.a.kamble@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1505842071-12787-1-git-send-email-sagar.a.kamble@intel.com> References: <1505842071-12787-1-git-send-email-sagar.a.kamble@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 14/14] drm/i915: Reorganize HuC authentication X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Prepared intel_auth_huc to separate HuC specific functionality from GuC send action. Created new header intel_huc.h to group HuC specific declarations. v2: Changed argument preparation for AUTHENTICATE_HUC. s/intel_auth_huc/intel_huc_auth. Deferred creation of intel_huc.h to later patch. v3: Rebase as intel_guc.h is removed. Added param description to intel_huc_auth. (Michal) v4: Rebase as intel_guc.h is added again. :) Cc: Michal Wajdeczko Cc: Michał Winiarski Reviewed-by: Michal Wajdeczko Signed-off-by: Sagar Arun Kamble --- drivers/gpu/drm/i915/intel_guc.c | 18 ++++++++++++++++++ drivers/gpu/drm/i915/intel_guc.h | 1 + drivers/gpu/drm/i915/intel_huc.c | 22 +++++++--------------- drivers/gpu/drm/i915/intel_huc.h | 2 +- drivers/gpu/drm/i915/intel_uc.c | 2 +- 5 files changed, 28 insertions(+), 17 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_guc.c b/drivers/gpu/drm/i915/intel_guc.c index 86a518f..c731cff 100644 --- a/drivers/gpu/drm/i915/intel_guc.c +++ b/drivers/gpu/drm/i915/intel_guc.c @@ -226,3 +226,21 @@ void intel_guc_cleanup(struct intel_guc *guc) if (i915.enable_guc_submission) i915_guc_submission_cleanup(dev_priv); } + +/** + * intel_guc_auth_huc() - authenticate ucode + * @guc: struct intel_guc* + * @offset: rsa offset w.r.t ggtt base of huc vma + * + * triggers a huc fw authentication request to the guc via intel_guc_send + * authenticate_huc interface. + */ +int intel_guc_auth_huc(struct intel_guc *guc, u32 rsa_offset) +{ + u32 action[] = { + INTEL_GUC_ACTION_AUTHENTICATE_HUC, + rsa_offset + }; + + return intel_guc_send(guc, action, ARRAY_SIZE(action)); +} diff --git a/drivers/gpu/drm/i915/intel_guc.h b/drivers/gpu/drm/i915/intel_guc.h index 0726002..a894991 100644 --- a/drivers/gpu/drm/i915/intel_guc.h +++ b/drivers/gpu/drm/i915/intel_guc.h @@ -134,6 +134,7 @@ struct intel_guc { int intel_guc_runtime_suspend(struct intel_guc *guc); int intel_guc_runtime_resume(struct intel_guc *guc); void intel_guc_cleanup(struct intel_guc *guc); +int intel_guc_auth_huc(struct intel_guc *guc, u32 rsa_offset); static inline int intel_guc_send(struct intel_guc *guc, const u32 *action, u32 len) { diff --git a/drivers/gpu/drm/i915/intel_huc.c b/drivers/gpu/drm/i915/intel_huc.c index 6145fa0..d3da4d3 100644 --- a/drivers/gpu/drm/i915/intel_huc.c +++ b/drivers/gpu/drm/i915/intel_huc.c @@ -225,19 +225,16 @@ void intel_huc_init_hw(struct intel_huc *huc) } /** - * intel_guc_auth_huc() - authenticate ucode - * @dev_priv: the drm_i915_device - * - * Triggers a HuC fw authentication request to the GuC via intel_guc_action_ - * authenticate_huc interface. + * intel_huc_auth() - authenticate ucode + * @huc: intel_huc structure */ -void intel_guc_auth_huc(struct drm_i915_private *dev_priv) +void intel_huc_auth(struct intel_huc *huc) { + struct drm_i915_private *dev_priv = huc_to_i915(huc); struct intel_guc *guc = &dev_priv->guc; - struct intel_huc *huc = &dev_priv->huc; struct i915_vma *vma; + u32 offset; int ret; - u32 data[2]; if (huc->fw.load_status != INTEL_UC_FIRMWARE_SUCCESS) return; @@ -250,11 +247,8 @@ void intel_guc_auth_huc(struct drm_i915_private *dev_priv) return; } - /* Specify auth action and where public signature is. */ - data[0] = INTEL_GUC_ACTION_AUTHENTICATE_HUC; - data[1] = guc_ggtt_offset(vma) + huc->fw.rsa_offset; - - ret = intel_guc_send(guc, data, ARRAY_SIZE(data)); + offset = guc_ggtt_offset(vma) + huc->fw.rsa_offset; + ret = intel_guc_auth_huc(guc, offset); if (ret) { DRM_ERROR("HuC: GuC did not ack Auth request %d\n", ret); goto out; @@ -266,7 +260,6 @@ void intel_guc_auth_huc(struct drm_i915_private *dev_priv) HUC_FW_VERIFIED, HUC_FW_VERIFIED, 50); - if (ret) { DRM_ERROR("HuC: Authentication failed %d\n", ret); goto out; @@ -275,4 +268,3 @@ void intel_guc_auth_huc(struct drm_i915_private *dev_priv) out: i915_vma_unpin(vma); } - diff --git a/drivers/gpu/drm/i915/intel_huc.h b/drivers/gpu/drm/i915/intel_huc.h index 9755e12..f9cf81a8 100644 --- a/drivers/gpu/drm/i915/intel_huc.h +++ b/drivers/gpu/drm/i915/intel_huc.h @@ -36,6 +36,6 @@ struct intel_huc { /* intel_huc.c */ void intel_huc_select_fw(struct intel_huc *huc); void intel_huc_init_hw(struct intel_huc *huc); -void intel_guc_auth_huc(struct drm_i915_private *dev_priv); +void intel_huc_auth(struct intel_huc *huc); #endif diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c index 9ecf0e0..bb31243 100644 --- a/drivers/gpu/drm/i915/intel_uc.c +++ b/drivers/gpu/drm/i915/intel_uc.c @@ -354,7 +354,7 @@ int intel_uc_init_hw(struct drm_i915_private *dev_priv) if (ret) goto err_log_capture; - intel_guc_auth_huc(dev_priv); + intel_huc_auth(&dev_priv->huc); if (i915.enable_guc_submission) { if (i915.guc_log_level >= 0) gen9_enable_guc_interrupts(dev_priv);