From patchwork Tue Sep 19 17:41:48 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: sagar.a.kamble@intel.com X-Patchwork-Id: 9959841 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 244B2601E9 for ; Tue, 19 Sep 2017 17:39:15 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0F42C28791 for ; Tue, 19 Sep 2017 17:39:15 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 0433C28985; Tue, 19 Sep 2017 17:39:15 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 998FC28791 for ; Tue, 19 Sep 2017 17:39:14 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 0B4996E62A; Tue, 19 Sep 2017 17:39:10 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by gabe.freedesktop.org (Postfix) with ESMTPS id 715976E628 for ; Tue, 19 Sep 2017 17:39:06 +0000 (UTC) Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 19 Sep 2017 10:39:05 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos; i="5.42,418,1500966000"; d="scan'208"; a="1016260906" Received: from sakamble-desktop.iind.intel.com ([10.223.26.118]) by orsmga003.jf.intel.com with ESMTP; 19 Sep 2017 10:39:04 -0700 From: Sagar Arun Kamble To: intel-gfx@lists.freedesktop.org Date: Tue, 19 Sep 2017 23:11:48 +0530 Message-Id: <1505842927-13327-13-git-send-email-sagar.a.kamble@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1505842927-13327-1-git-send-email-sagar.a.kamble@intel.com> References: <1505842927-13327-1-git-send-email-sagar.a.kamble@intel.com> Subject: [Intel-gfx] [PATCH 12/31] drm/i915: Define RPS idle, busy, boost function pointers X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP These will allow to define nop functions when SLPC is in use. Initialized with gen6_rps_idle, gen6_rps_busy and gen6_rps_boost during intel_enable_rps. Cc: Imre Deak Cc: Chris Wilson Signed-off-by: Sagar Arun Kamble --- drivers/gpu/drm/i915/i915_drv.h | 5 +++++ drivers/gpu/drm/i915/i915_gem.c | 6 +++--- drivers/gpu/drm/i915/i915_gem_request.c | 2 +- drivers/gpu/drm/i915/intel_display.c | 2 +- drivers/gpu/drm/i915/intel_pm.c | 24 ++++++++++++++++++++++++ 5 files changed, 34 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index a09952d..5fcebb8 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1350,6 +1350,11 @@ struct intel_rps { /* manual wa residency calculations */ struct intel_rps_ei ei; + + void (*idle)(struct drm_i915_private *dev_priv); + void (*busy)(struct drm_i915_private *dev_priv); + void (*boost)(struct drm_i915_gem_request *rq, + struct intel_rps_client *rps); }; struct intel_rc6 { diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 76e1bb2..efea38a 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -388,7 +388,7 @@ int i915_gem_object_unbind(struct drm_i915_gem_object *obj) */ if (rps) { if (INTEL_GEN(rq->i915) >= 6) - gen6_rps_boost(rq, rps); + rq->i915->pm.rps.boost(rq, rps); else rps = NULL; } @@ -2991,7 +2991,7 @@ void i915_gem_reset(struct drm_i915_private *dev_priv) intel_sanitize_gt_powersave(dev_priv); intel_enable_gt_powersave(dev_priv); if (INTEL_GEN(dev_priv) >= 6) - gen6_rps_busy(dev_priv); + dev_priv->pm.rps.busy(dev_priv); } } @@ -3199,7 +3199,7 @@ bool i915_gem_unset_wedged(struct drm_i915_private *i915) rearm_hangcheck = false; if (INTEL_GEN(dev_priv) >= 6) - gen6_rps_idle(dev_priv); + dev_priv->pm.rps.idle(dev_priv); intel_runtime_pm_put(dev_priv); out_unlock: mutex_unlock(&dev->struct_mutex); diff --git a/drivers/gpu/drm/i915/i915_gem_request.c b/drivers/gpu/drm/i915/i915_gem_request.c index 023af2d..8ebd660 100644 --- a/drivers/gpu/drm/i915/i915_gem_request.c +++ b/drivers/gpu/drm/i915/i915_gem_request.c @@ -257,7 +257,7 @@ static void mark_busy(struct drm_i915_private *i915) intel_enable_gt_powersave(i915); i915_update_gfx_val(i915); if (INTEL_GEN(i915) >= 6) - gen6_rps_busy(i915); + i915->pm.rps.busy(i915); queue_delayed_work(i915->wq, &i915->gt.retire_work, diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index eb53093..7505e3e 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -12607,7 +12607,7 @@ static int do_rps_boost(struct wait_queue_entry *_wait, struct wait_rps_boost *wait = container_of(_wait, typeof(*wait), wait); struct drm_i915_gem_request *rq = wait->request; - gen6_rps_boost(rq, NULL); + rq->i915->pm.rps.boost(rq, NULL); i915_gem_request_put(rq); drm_crtc_vblank_put(wait->crtc); diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index ac20dbf..20ec8f4 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -7889,6 +7889,22 @@ static inline void intel_update_ring_freq(struct drm_i915_private *i915) } } +static void rps_idle_nop(struct drm_i915_private *dev_priv) +{ + DRM_DEBUG_DRIVER("\n"); +} + +static void rps_busy_nop(struct drm_i915_private *dev_priv) +{ + DRM_DEBUG_DRIVER("\n"); +} + +static void rps_boost_nop(struct drm_i915_gem_request *rq, + struct intel_rps_client *rps) +{ + DRM_DEBUG_DRIVER("\n"); +} + void intel_init_gt_powersave(struct drm_i915_private *dev_priv) { struct intel_rps *rps = &dev_priv->pm.rps; @@ -7943,6 +7959,10 @@ void intel_init_gt_powersave(struct drm_i915_private *dev_priv) /* Finally allow us to boost to max by default */ rps->boost_freq = rps->max_freq; + dev_priv->pm.rps.idle = rps_idle_nop; + dev_priv->pm.rps.busy = rps_busy_nop; + dev_priv->pm.rps.boost = rps_boost_nop; + mutex_unlock(&dev_priv->pm.pcu_lock); mutex_unlock(&dev_priv->drm.struct_mutex); @@ -8064,6 +8084,10 @@ void intel_enable_rps(struct drm_i915_private *dev_priv) if (READ_ONCE(dev_priv->pm.rps.enabled)) return; + dev_priv->pm.rps.idle = gen6_rps_idle; + dev_priv->pm.rps.busy = gen6_rps_busy; + dev_priv->pm.rps.boost = gen6_rps_boost; + if (IS_CHERRYVIEW(dev_priv)) { cherryview_enable_rps(dev_priv); } else if (IS_VALLEYVIEW(dev_priv)) {