| Message ID | 1505929104-28823-3-git-send-email-sagar.a.kamble@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Wed, 20 Sep 2017 19:38:17 +0200, Sagar Arun Kamble <sagar.a.kamble@intel.com> wrote: > Renamed intel_guc_suspend to intel_guc_enter_sleep and intel_guc_resume > to intel_guc_exit_sleep to match GuC nomenclature compatibility. > We plan to use intel_guc_suspend and intel_guc_resume through > intel_uc_suspend and intel_uc_resume in the path i915_drm_suspend and > i915_drm_resume respectively for better naming. > Also, with this patch we pass intel_guc struct as parameter to > enter_sleep > and exit_sleep functions as they are GuC specific and they are moved to > intel_uc.c as static functions called from uc generic functions. > I'm not sure that we need this semi-refactoring right now. We can return to this later and do it right at once. Michal > v2: Rebase w.r.t removal of GuC code restructuring. > > Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> > Cc: Michał Winiarski <michal.winiarski@intel.com> > Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com> > --- > drivers/gpu/drm/i915/i915_guc_submission.c | 52 > --------------------------- > drivers/gpu/drm/i915/intel_uc.c | 58 > ++++++++++++++++++++++++++++-- > drivers/gpu/drm/i915/intel_uc.h | 2 -- > 3 files changed, 55 insertions(+), 57 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c > b/drivers/gpu/drm/i915/i915_guc_submission.c > index e191d56..94efe32 100644 > --- a/drivers/gpu/drm/i915/i915_guc_submission.c > +++ b/drivers/gpu/drm/i915/i915_guc_submission.c > @@ -1205,55 +1205,3 @@ void i915_guc_submission_disable(struct > drm_i915_private *dev_priv) > guc_client_free(guc->execbuf_client); > guc->execbuf_client = NULL; > } > - > -/** > - * intel_guc_suspend() - notify GuC entering suspend state > - * @dev_priv: i915 device private > - */ > -int intel_guc_suspend(struct drm_i915_private *dev_priv) > -{ > - struct intel_guc *guc = &dev_priv->guc; > - struct i915_gem_context *ctx; > - u32 data[3]; > - > - if (guc->fw.load_status != INTEL_UC_FIRMWARE_SUCCESS) > - return 0; > - > - gen9_disable_guc_interrupts(dev_priv); > - > - ctx = dev_priv->kernel_context; > - > - data[0] = INTEL_GUC_ACTION_ENTER_S_STATE; > - /* any value greater than GUC_POWER_D0 */ > - data[1] = GUC_POWER_D1; > - /* first page is shared data with GuC */ > - data[2] = guc_ggtt_offset(ctx->engine[RCS].state) + LRC_GUCSHR_PN * > PAGE_SIZE; > - > - return intel_guc_send(guc, data, ARRAY_SIZE(data)); > -} > - > -/** > - * intel_guc_resume() - notify GuC resuming from suspend state > - * @dev_priv: i915 device private > - */ > -int intel_guc_resume(struct drm_i915_private *dev_priv) > -{ > - struct intel_guc *guc = &dev_priv->guc; > - struct i915_gem_context *ctx; > - u32 data[3]; > - > - if (guc->fw.load_status != INTEL_UC_FIRMWARE_SUCCESS) > - return 0; > - > - if (i915.guc_log_level >= 0) > - gen9_enable_guc_interrupts(dev_priv); > - > - ctx = dev_priv->kernel_context; > - > - data[0] = INTEL_GUC_ACTION_EXIT_S_STATE; > - data[1] = GUC_POWER_D0; > - /* first page is shared data with GuC */ > - data[2] = guc_ggtt_offset(ctx->engine[RCS].state) + LRC_GUCSHR_PN * > PAGE_SIZE; > - > - return intel_guc_send(guc, data, ARRAY_SIZE(data)); > -} > diff --git a/drivers/gpu/drm/i915/intel_uc.c > b/drivers/gpu/drm/i915/intel_uc.c > index 8e4d8b0..0dbb4b9 100644 > --- a/drivers/gpu/drm/i915/intel_uc.c > +++ b/drivers/gpu/drm/i915/intel_uc.c > @@ -538,19 +538,71 @@ int intel_guc_sample_forcewake(struct intel_guc > *guc) > return intel_guc_send(guc, action, ARRAY_SIZE(action)); > } > +/** > + * intel_guc_enter_sleep() - notify GuC entering sleep state > + * @guc: guc structure > + */ > +static int intel_guc_enter_sleep(struct intel_guc *guc) > +{ > + struct drm_i915_private *dev_priv = guc_to_i915(guc); > + struct i915_gem_context *ctx; > + u32 data[3]; > + > + if (guc->fw.load_status != INTEL_UC_FIRMWARE_SUCCESS) > + return 0; > + > + gen9_disable_guc_interrupts(dev_priv); > + > + ctx = dev_priv->kernel_context; > + > + data[0] = INTEL_GUC_ACTION_ENTER_S_STATE; > + /* any value greater than GUC_POWER_D0 */ > + data[1] = GUC_POWER_D1; > + /* first page is shared data with GuC */ > + data[2] = guc_ggtt_offset(ctx->engine[RCS].state) + LRC_GUCSHR_PN * > PAGE_SIZE; > + > + return intel_guc_send(guc, data, ARRAY_SIZE(data)); > +} > + > +/** > + * intel_guc_exit_sleep() - notify GuC exit from sleep state > + * @guc: guc structure > + */ > +static int intel_guc_exit_sleep(struct intel_guc *guc) > +{ > + struct drm_i915_private *dev_priv = guc_to_i915(guc); > + struct i915_gem_context *ctx; > + u32 data[3]; > + > + if (guc->fw.load_status != INTEL_UC_FIRMWARE_SUCCESS) > + return 0; > + > + if (i915.guc_log_level >= 0) > + gen9_enable_guc_interrupts(dev_priv); > + > + ctx = dev_priv->kernel_context; > + > + data[0] = INTEL_GUC_ACTION_EXIT_S_STATE; > + data[1] = GUC_POWER_D0; > + /* first page is shared data with GuC */ > + data[2] = guc_ggtt_offset(ctx->engine[RCS].state) + LRC_GUCSHR_PN * > PAGE_SIZE; > + > + return intel_guc_send(guc, data, ARRAY_SIZE(data)); > +} > + > int intel_uc_runtime_suspend(struct drm_i915_private *dev_priv) > { > - return intel_guc_suspend(dev_priv); > + return intel_guc_enter_sleep(&dev_priv->guc); > } > int intel_uc_runtime_resume(struct drm_i915_private *dev_priv) > { > - return intel_guc_resume(dev_priv); > + return intel_guc_exit_sleep(&dev_priv->guc); > } > int intel_uc_suspend(struct drm_i915_private *dev_priv) > { > - return intel_guc_suspend(dev_priv); > + return intel_guc_enter_sleep(&dev_priv->guc); > } > int intel_uc_resume(struct drm_i915_private *dev_priv) > diff --git a/drivers/gpu/drm/i915/intel_uc.h > b/drivers/gpu/drm/i915/intel_uc.h > index 3d33a51..5f49d13 100644 > --- a/drivers/gpu/drm/i915/intel_uc.h > +++ b/drivers/gpu/drm/i915/intel_uc.h > @@ -229,8 +229,6 @@ static inline void intel_guc_notify(struct intel_guc > *guc) > /* intel_guc_loader.c */ > int intel_guc_select_fw(struct intel_guc *guc); > int intel_guc_init_hw(struct intel_guc *guc); > -int intel_guc_suspend(struct drm_i915_private *dev_priv); > -int intel_guc_resume(struct drm_i915_private *dev_priv); > u32 intel_guc_wopcm_size(struct drm_i915_private *dev_priv); > /* i915_guc_submission.c */
On 9/21/2017 2:55 AM, Michal Wajdeczko wrote: > On Wed, 20 Sep 2017 19:38:17 +0200, Sagar Arun Kamble > <sagar.a.kamble@intel.com> wrote: > >> Renamed intel_guc_suspend to intel_guc_enter_sleep and intel_guc_resume >> to intel_guc_exit_sleep to match GuC nomenclature compatibility. >> We plan to use intel_guc_suspend and intel_guc_resume through >> intel_uc_suspend and intel_uc_resume in the path i915_drm_suspend and >> i915_drm_resume respectively for better naming. >> Also, with this patch we pass intel_guc struct as parameter to >> enter_sleep >> and exit_sleep functions as they are GuC specific and they are moved to >> intel_uc.c as static functions called from uc generic functions. >> > > I'm not sure that we need this semi-refactoring right now. > We can return to this later and do it right at once. > > Michal Ok. Will return to this later. Dropping in next series. > >> v2: Rebase w.r.t removal of GuC code restructuring. >> >> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> >> Cc: Michał Winiarski <michal.winiarski@intel.com> >> Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com> >> --- >> drivers/gpu/drm/i915/i915_guc_submission.c | 52 >> --------------------------- >> drivers/gpu/drm/i915/intel_uc.c | 58 >> ++++++++++++++++++++++++++++-- >> drivers/gpu/drm/i915/intel_uc.h | 2 -- >> 3 files changed, 55 insertions(+), 57 deletions(-) >> >> diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c >> b/drivers/gpu/drm/i915/i915_guc_submission.c >> index e191d56..94efe32 100644 >> --- a/drivers/gpu/drm/i915/i915_guc_submission.c >> +++ b/drivers/gpu/drm/i915/i915_guc_submission.c >> @@ -1205,55 +1205,3 @@ void i915_guc_submission_disable(struct >> drm_i915_private *dev_priv) >> guc_client_free(guc->execbuf_client); >> guc->execbuf_client = NULL; >> } >> - >> -/** >> - * intel_guc_suspend() - notify GuC entering suspend state >> - * @dev_priv: i915 device private >> - */ >> -int intel_guc_suspend(struct drm_i915_private *dev_priv) >> -{ >> - struct intel_guc *guc = &dev_priv->guc; >> - struct i915_gem_context *ctx; >> - u32 data[3]; >> - >> - if (guc->fw.load_status != INTEL_UC_FIRMWARE_SUCCESS) >> - return 0; >> - >> - gen9_disable_guc_interrupts(dev_priv); >> - >> - ctx = dev_priv->kernel_context; >> - >> - data[0] = INTEL_GUC_ACTION_ENTER_S_STATE; >> - /* any value greater than GUC_POWER_D0 */ >> - data[1] = GUC_POWER_D1; >> - /* first page is shared data with GuC */ >> - data[2] = guc_ggtt_offset(ctx->engine[RCS].state) + >> LRC_GUCSHR_PN * PAGE_SIZE; >> - >> - return intel_guc_send(guc, data, ARRAY_SIZE(data)); >> -} >> - >> -/** >> - * intel_guc_resume() - notify GuC resuming from suspend state >> - * @dev_priv: i915 device private >> - */ >> -int intel_guc_resume(struct drm_i915_private *dev_priv) >> -{ >> - struct intel_guc *guc = &dev_priv->guc; >> - struct i915_gem_context *ctx; >> - u32 data[3]; >> - >> - if (guc->fw.load_status != INTEL_UC_FIRMWARE_SUCCESS) >> - return 0; >> - >> - if (i915.guc_log_level >= 0) >> - gen9_enable_guc_interrupts(dev_priv); >> - >> - ctx = dev_priv->kernel_context; >> - >> - data[0] = INTEL_GUC_ACTION_EXIT_S_STATE; >> - data[1] = GUC_POWER_D0; >> - /* first page is shared data with GuC */ >> - data[2] = guc_ggtt_offset(ctx->engine[RCS].state) + >> LRC_GUCSHR_PN * PAGE_SIZE; >> - >> - return intel_guc_send(guc, data, ARRAY_SIZE(data)); >> -} >> diff --git a/drivers/gpu/drm/i915/intel_uc.c >> b/drivers/gpu/drm/i915/intel_uc.c >> index 8e4d8b0..0dbb4b9 100644 >> --- a/drivers/gpu/drm/i915/intel_uc.c >> +++ b/drivers/gpu/drm/i915/intel_uc.c >> @@ -538,19 +538,71 @@ int intel_guc_sample_forcewake(struct intel_guc >> *guc) >> return intel_guc_send(guc, action, ARRAY_SIZE(action)); >> } >> +/** >> + * intel_guc_enter_sleep() - notify GuC entering sleep state >> + * @guc: guc structure >> + */ >> +static int intel_guc_enter_sleep(struct intel_guc *guc) >> +{ >> + struct drm_i915_private *dev_priv = guc_to_i915(guc); >> + struct i915_gem_context *ctx; >> + u32 data[3]; >> + >> + if (guc->fw.load_status != INTEL_UC_FIRMWARE_SUCCESS) >> + return 0; >> + >> + gen9_disable_guc_interrupts(dev_priv); >> + >> + ctx = dev_priv->kernel_context; >> + >> + data[0] = INTEL_GUC_ACTION_ENTER_S_STATE; >> + /* any value greater than GUC_POWER_D0 */ >> + data[1] = GUC_POWER_D1; >> + /* first page is shared data with GuC */ >> + data[2] = guc_ggtt_offset(ctx->engine[RCS].state) + >> LRC_GUCSHR_PN * PAGE_SIZE; >> + >> + return intel_guc_send(guc, data, ARRAY_SIZE(data)); >> +} >> + >> +/** >> + * intel_guc_exit_sleep() - notify GuC exit from sleep state >> + * @guc: guc structure >> + */ >> +static int intel_guc_exit_sleep(struct intel_guc *guc) >> +{ >> + struct drm_i915_private *dev_priv = guc_to_i915(guc); >> + struct i915_gem_context *ctx; >> + u32 data[3]; >> + >> + if (guc->fw.load_status != INTEL_UC_FIRMWARE_SUCCESS) >> + return 0; >> + >> + if (i915.guc_log_level >= 0) >> + gen9_enable_guc_interrupts(dev_priv); >> + >> + ctx = dev_priv->kernel_context; >> + >> + data[0] = INTEL_GUC_ACTION_EXIT_S_STATE; >> + data[1] = GUC_POWER_D0; >> + /* first page is shared data with GuC */ >> + data[2] = guc_ggtt_offset(ctx->engine[RCS].state) + >> LRC_GUCSHR_PN * PAGE_SIZE; >> + >> + return intel_guc_send(guc, data, ARRAY_SIZE(data)); >> +} >> + >> int intel_uc_runtime_suspend(struct drm_i915_private *dev_priv) >> { >> - return intel_guc_suspend(dev_priv); >> + return intel_guc_enter_sleep(&dev_priv->guc); >> } >> int intel_uc_runtime_resume(struct drm_i915_private *dev_priv) >> { >> - return intel_guc_resume(dev_priv); >> + return intel_guc_exit_sleep(&dev_priv->guc); >> } >> int intel_uc_suspend(struct drm_i915_private *dev_priv) >> { >> - return intel_guc_suspend(dev_priv); >> + return intel_guc_enter_sleep(&dev_priv->guc); >> } >> int intel_uc_resume(struct drm_i915_private *dev_priv) >> diff --git a/drivers/gpu/drm/i915/intel_uc.h >> b/drivers/gpu/drm/i915/intel_uc.h >> index 3d33a51..5f49d13 100644 >> --- a/drivers/gpu/drm/i915/intel_uc.h >> +++ b/drivers/gpu/drm/i915/intel_uc.h >> @@ -229,8 +229,6 @@ static inline void intel_guc_notify(struct >> intel_guc *guc) >> /* intel_guc_loader.c */ >> int intel_guc_select_fw(struct intel_guc *guc); >> int intel_guc_init_hw(struct intel_guc *guc); >> -int intel_guc_suspend(struct drm_i915_private *dev_priv); >> -int intel_guc_resume(struct drm_i915_private *dev_priv); >> u32 intel_guc_wopcm_size(struct drm_i915_private *dev_priv); >> /* i915_guc_submission.c */
diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c b/drivers/gpu/drm/i915/i915_guc_submission.c index e191d56..94efe32 100644 --- a/drivers/gpu/drm/i915/i915_guc_submission.c +++ b/drivers/gpu/drm/i915/i915_guc_submission.c @@ -1205,55 +1205,3 @@ void i915_guc_submission_disable(struct drm_i915_private *dev_priv) guc_client_free(guc->execbuf_client); guc->execbuf_client = NULL; } - -/** - * intel_guc_suspend() - notify GuC entering suspend state - * @dev_priv: i915 device private - */ -int intel_guc_suspend(struct drm_i915_private *dev_priv) -{ - struct intel_guc *guc = &dev_priv->guc; - struct i915_gem_context *ctx; - u32 data[3]; - - if (guc->fw.load_status != INTEL_UC_FIRMWARE_SUCCESS) - return 0; - - gen9_disable_guc_interrupts(dev_priv); - - ctx = dev_priv->kernel_context; - - data[0] = INTEL_GUC_ACTION_ENTER_S_STATE; - /* any value greater than GUC_POWER_D0 */ - data[1] = GUC_POWER_D1; - /* first page is shared data with GuC */ - data[2] = guc_ggtt_offset(ctx->engine[RCS].state) + LRC_GUCSHR_PN * PAGE_SIZE; - - return intel_guc_send(guc, data, ARRAY_SIZE(data)); -} - -/** - * intel_guc_resume() - notify GuC resuming from suspend state - * @dev_priv: i915 device private - */ -int intel_guc_resume(struct drm_i915_private *dev_priv) -{ - struct intel_guc *guc = &dev_priv->guc; - struct i915_gem_context *ctx; - u32 data[3]; - - if (guc->fw.load_status != INTEL_UC_FIRMWARE_SUCCESS) - return 0; - - if (i915.guc_log_level >= 0) - gen9_enable_guc_interrupts(dev_priv); - - ctx = dev_priv->kernel_context; - - data[0] = INTEL_GUC_ACTION_EXIT_S_STATE; - data[1] = GUC_POWER_D0; - /* first page is shared data with GuC */ - data[2] = guc_ggtt_offset(ctx->engine[RCS].state) + LRC_GUCSHR_PN * PAGE_SIZE; - - return intel_guc_send(guc, data, ARRAY_SIZE(data)); -} diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c index 8e4d8b0..0dbb4b9 100644 --- a/drivers/gpu/drm/i915/intel_uc.c +++ b/drivers/gpu/drm/i915/intel_uc.c @@ -538,19 +538,71 @@ int intel_guc_sample_forcewake(struct intel_guc *guc) return intel_guc_send(guc, action, ARRAY_SIZE(action)); } +/** + * intel_guc_enter_sleep() - notify GuC entering sleep state + * @guc: guc structure + */ +static int intel_guc_enter_sleep(struct intel_guc *guc) +{ + struct drm_i915_private *dev_priv = guc_to_i915(guc); + struct i915_gem_context *ctx; + u32 data[3]; + + if (guc->fw.load_status != INTEL_UC_FIRMWARE_SUCCESS) + return 0; + + gen9_disable_guc_interrupts(dev_priv); + + ctx = dev_priv->kernel_context; + + data[0] = INTEL_GUC_ACTION_ENTER_S_STATE; + /* any value greater than GUC_POWER_D0 */ + data[1] = GUC_POWER_D1; + /* first page is shared data with GuC */ + data[2] = guc_ggtt_offset(ctx->engine[RCS].state) + LRC_GUCSHR_PN * PAGE_SIZE; + + return intel_guc_send(guc, data, ARRAY_SIZE(data)); +} + +/** + * intel_guc_exit_sleep() - notify GuC exit from sleep state + * @guc: guc structure + */ +static int intel_guc_exit_sleep(struct intel_guc *guc) +{ + struct drm_i915_private *dev_priv = guc_to_i915(guc); + struct i915_gem_context *ctx; + u32 data[3]; + + if (guc->fw.load_status != INTEL_UC_FIRMWARE_SUCCESS) + return 0; + + if (i915.guc_log_level >= 0) + gen9_enable_guc_interrupts(dev_priv); + + ctx = dev_priv->kernel_context; + + data[0] = INTEL_GUC_ACTION_EXIT_S_STATE; + data[1] = GUC_POWER_D0; + /* first page is shared data with GuC */ + data[2] = guc_ggtt_offset(ctx->engine[RCS].state) + LRC_GUCSHR_PN * PAGE_SIZE; + + return intel_guc_send(guc, data, ARRAY_SIZE(data)); +} + int intel_uc_runtime_suspend(struct drm_i915_private *dev_priv) { - return intel_guc_suspend(dev_priv); + return intel_guc_enter_sleep(&dev_priv->guc); } int intel_uc_runtime_resume(struct drm_i915_private *dev_priv) { - return intel_guc_resume(dev_priv); + return intel_guc_exit_sleep(&dev_priv->guc); } int intel_uc_suspend(struct drm_i915_private *dev_priv) { - return intel_guc_suspend(dev_priv); + return intel_guc_enter_sleep(&dev_priv->guc); } int intel_uc_resume(struct drm_i915_private *dev_priv) diff --git a/drivers/gpu/drm/i915/intel_uc.h b/drivers/gpu/drm/i915/intel_uc.h index 3d33a51..5f49d13 100644 --- a/drivers/gpu/drm/i915/intel_uc.h +++ b/drivers/gpu/drm/i915/intel_uc.h @@ -229,8 +229,6 @@ static inline void intel_guc_notify(struct intel_guc *guc) /* intel_guc_loader.c */ int intel_guc_select_fw(struct intel_guc *guc); int intel_guc_init_hw(struct intel_guc *guc); -int intel_guc_suspend(struct drm_i915_private *dev_priv); -int intel_guc_resume(struct drm_i915_private *dev_priv); u32 intel_guc_wopcm_size(struct drm_i915_private *dev_priv); /* i915_guc_submission.c */
Renamed intel_guc_suspend to intel_guc_enter_sleep and intel_guc_resume to intel_guc_exit_sleep to match GuC nomenclature compatibility. We plan to use intel_guc_suspend and intel_guc_resume through intel_uc_suspend and intel_uc_resume in the path i915_drm_suspend and i915_drm_resume respectively for better naming. Also, with this patch we pass intel_guc struct as parameter to enter_sleep and exit_sleep functions as they are GuC specific and they are moved to intel_uc.c as static functions called from uc generic functions. v2: Rebase w.r.t removal of GuC code restructuring. Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Michał Winiarski <michal.winiarski@intel.com> Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com> --- drivers/gpu/drm/i915/i915_guc_submission.c | 52 --------------------------- drivers/gpu/drm/i915/intel_uc.c | 58 ++++++++++++++++++++++++++++-- drivers/gpu/drm/i915/intel_uc.h | 2 -- 3 files changed, 55 insertions(+), 57 deletions(-)