From patchwork Wed Sep 20 17:38:21 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: sagar.a.kamble@intel.com X-Patchwork-Id: 9961971 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id AA4BE60234 for ; Wed, 20 Sep 2017 17:35:17 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 954E42907C for ; Wed, 20 Sep 2017 17:35:17 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8A528291E0; Wed, 20 Sep 2017 17:35:17 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 327612907C for ; Wed, 20 Sep 2017 17:35:17 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 3F7356E7A1; Wed, 20 Sep 2017 17:35:15 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTPS id BDC226E799 for ; Wed, 20 Sep 2017 17:35:08 +0000 (UTC) Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 20 Sep 2017 10:35:08 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.42,422,1500966000"; d="scan'208";a="137585793" Received: from sakamble-desktop.iind.intel.com ([10.223.26.118]) by orsmga002.jf.intel.com with ESMTP; 20 Sep 2017 10:35:07 -0700 From: Sagar Arun Kamble To: intel-gfx@lists.freedesktop.org Date: Wed, 20 Sep 2017 23:08:21 +0530 Message-Id: <1505929104-28823-7-git-send-email-sagar.a.kamble@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1505929104-28823-1-git-send-email-sagar.a.kamble@intel.com> References: <1505929104-28823-1-git-send-email-sagar.a.kamble@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v4 6/9] drm/i915/guc: Fix GuC cleanup in unload path X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP We ensure that GuC is completely suspended and client is destroyed in i915_gem_suspend during i915_driver_unload. So now intel_uc_fini_hw should just take care of cleanup, hence s/intel_uc_fini_hw/intel_uc_cleanup. Correspondingly we also updated as s/i915_guc_submission_fini/i915_guc_submission_cleanup Other functionality to disable communication, disable interrupts and update of ggtt.invalidate is taken care by intel_uc_suspend. With this patch we are also doing guc_free_load_err_log only if i915.enable_guc_loading is set. Created intel_guc_cleanup function to wrap the cleanup functions specific to GuC. v2: Rebase w.r.t removal of GuC code restructuring. Cc: Michal Wajdeczko Cc: Michał Winiarski Signed-off-by: Sagar Arun Kamble --- drivers/gpu/drm/i915/i915_drv.c | 2 +- drivers/gpu/drm/i915/i915_guc_submission.c | 2 +- drivers/gpu/drm/i915/intel_uc.c | 21 +++++++++++---------- drivers/gpu/drm/i915/intel_uc.h | 4 ++-- 4 files changed, 15 insertions(+), 14 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 8635f40..6f36ced 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -602,7 +602,7 @@ static void i915_gem_fini(struct drm_i915_private *dev_priv) i915_gem_drain_workqueue(dev_priv); mutex_lock(&dev_priv->drm.struct_mutex); - intel_uc_fini_hw(dev_priv); + intel_uc_cleanup(dev_priv); i915_gem_cleanup_engines(dev_priv); i915_gem_contexts_fini(dev_priv); i915_gem_cleanup_userptr(dev_priv); diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c b/drivers/gpu/drm/i915/i915_guc_submission.c index 94efe32..12f1195 100644 --- a/drivers/gpu/drm/i915/i915_guc_submission.c +++ b/drivers/gpu/drm/i915/i915_guc_submission.c @@ -1050,7 +1050,7 @@ int i915_guc_submission_init(struct drm_i915_private *dev_priv) return ret; } -void i915_guc_submission_fini(struct drm_i915_private *dev_priv) +void i915_guc_submission_cleanup(struct drm_i915_private *dev_priv) { struct intel_guc *guc = &dev_priv->guc; diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c index aac8526..8c42344 100644 --- a/drivers/gpu/drm/i915/intel_uc.c +++ b/drivers/gpu/drm/i915/intel_uc.c @@ -418,7 +418,7 @@ int intel_uc_init_hw(struct drm_i915_private *dev_priv) guc_capture_load_err_log(guc); err_submission: if (i915.enable_guc_submission) - i915_guc_submission_fini(dev_priv); + i915_guc_submission_cleanup(dev_priv); err_guc: i915_ggtt_disable_guc(dev_priv); @@ -439,21 +439,22 @@ int intel_uc_init_hw(struct drm_i915_private *dev_priv) return ret; } -void intel_uc_fini_hw(struct drm_i915_private *dev_priv) +static void intel_guc_cleanup(struct intel_guc *guc) { - guc_free_load_err_log(&dev_priv->guc); + struct drm_i915_private *dev_priv = guc_to_i915(guc); + + if (i915.enable_guc_submission) + i915_guc_submission_cleanup(dev_priv); +} +void intel_uc_cleanup(struct drm_i915_private *dev_priv) +{ if (!i915.enable_guc_loading) return; - guc_disable_communication(&dev_priv->guc); - - if (i915.enable_guc_submission) { - gen9_disable_guc_interrupts(dev_priv); - i915_guc_submission_fini(dev_priv); - } + guc_free_load_err_log(&dev_priv->guc); - i915_ggtt_disable_guc(dev_priv); + intel_guc_cleanup(&dev_priv->guc); } int intel_guc_send_nop(struct intel_guc *guc, const u32 *action, u32 len) diff --git a/drivers/gpu/drm/i915/intel_uc.h b/drivers/gpu/drm/i915/intel_uc.h index 069c2b2..8557e33 100644 --- a/drivers/gpu/drm/i915/intel_uc.h +++ b/drivers/gpu/drm/i915/intel_uc.h @@ -207,7 +207,7 @@ struct intel_huc { void intel_uc_init_fw(struct drm_i915_private *dev_priv); void intel_uc_fini_fw(struct drm_i915_private *dev_priv); int intel_uc_init_hw(struct drm_i915_private *dev_priv); -void intel_uc_fini_hw(struct drm_i915_private *dev_priv); +void intel_uc_cleanup(struct drm_i915_private *dev_priv); int intel_uc_runtime_suspend(struct drm_i915_private *dev_priv); int intel_uc_runtime_resume(struct drm_i915_private *dev_priv); int intel_uc_suspend(struct drm_i915_private *dev_priv); @@ -236,7 +236,7 @@ static inline void intel_guc_notify(struct intel_guc *guc) int i915_guc_submission_init(struct drm_i915_private *dev_priv); int i915_guc_submission_enable(struct drm_i915_private *dev_priv); void i915_guc_submission_disable(struct drm_i915_private *dev_priv); -void i915_guc_submission_fini(struct drm_i915_private *dev_priv); +void i915_guc_submission_cleanup(struct drm_i915_private *dev_priv); struct i915_vma *intel_guc_allocate_vma(struct intel_guc *guc, u32 size); /* intel_guc_log.c */