From patchwork Wed Sep 27 09:30:35 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: sagar.a.kamble@intel.com X-Patchwork-Id: 9973599 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 04FE26037F for ; Wed, 27 Sep 2017 09:27:36 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 031CA29144 for ; Wed, 27 Sep 2017 09:27:36 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id EC4582914B; Wed, 27 Sep 2017 09:27:35 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 04A6429149 for ; Wed, 27 Sep 2017 09:27:34 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 28B366E6AB; Wed, 27 Sep 2017 09:27:33 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id D30E96E6A6 for ; Wed, 27 Sep 2017 09:27:31 +0000 (UTC) Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga104.jf.intel.com with ESMTP; 27 Sep 2017 02:27:31 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos; i="5.42,444,1500966000"; d="scan'208"; a="1018953370" Received: from sakamble-desktop.iind.intel.com ([10.223.26.118]) by orsmga003.jf.intel.com with ESMTP; 27 Sep 2017 02:27:30 -0700 From: Sagar Arun Kamble To: intel-gfx@lists.freedesktop.org Date: Wed, 27 Sep 2017 15:00:35 +0530 Message-Id: <1506504639-25631-6-git-send-email-sagar.a.kamble@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1506504639-25631-1-git-send-email-sagar.a.kamble@intel.com> References: <1506504639-25631-1-git-send-email-sagar.a.kamble@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v10 5/9] drm/i915/guc: Update GuC ggtt.invalidate/interrupts/communication across RPM suspend/resume X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Apart from configuring interrupts, we need to update the ggtt invalidate interface and GuC communication on suspend/resume. This functionality can be reused for other suspend and reset paths. v2: Rebase w.r.t removal of GuC code restructuring. v3: Removed GuC specific helpers as tasks other than send H2G for sleep/resume are to be done from uc generic functions. (Michal Wajdeczko) v4: Simplified/Unified the error messaging in uc_runtime_suspend/resume. (Michal Wajdeczko). Rebase w.r.t i915_modparams change. Added documentation to intel_uc_runtime_suspend/resume. Signed-off-by: Sagar Arun Kamble Cc: Michal Wajdeczko Cc: Michał Winiarski Reviewed-by: Michal Wajdeczko --- drivers/gpu/drm/i915/i915_guc_submission.c | 5 --- drivers/gpu/drm/i915/intel_uc.c | 60 +++++++++++++++++++++++++++++- 2 files changed, 58 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c b/drivers/gpu/drm/i915/i915_guc_submission.c index 04f1281..d1d6c0d 100644 --- a/drivers/gpu/drm/i915/i915_guc_submission.c +++ b/drivers/gpu/drm/i915/i915_guc_submission.c @@ -1226,8 +1226,6 @@ int intel_guc_suspend(struct drm_i915_private *dev_priv) if (guc->fw.load_status != INTEL_UC_FIRMWARE_SUCCESS) return 0; - gen9_disable_guc_interrupts(dev_priv); - ctx = dev_priv->kernel_context; data[0] = INTEL_GUC_ACTION_ENTER_S_STATE; @@ -1252,9 +1250,6 @@ int intel_guc_resume(struct drm_i915_private *dev_priv) if (guc->fw.load_status != INTEL_UC_FIRMWARE_SUCCESS) return 0; - if (i915_modparams.guc_log_level >= 0) - gen9_enable_guc_interrupts(dev_priv); - ctx = dev_priv->kernel_context; data[0] = INTEL_GUC_ACTION_EXIT_S_STATE; diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c index 7b30790..1446b5e 100644 --- a/drivers/gpu/drm/i915/intel_uc.c +++ b/drivers/gpu/drm/i915/intel_uc.c @@ -481,14 +481,70 @@ void intel_uc_fini_hw(struct drm_i915_private *dev_priv) i915_ggtt_disable_guc(dev_priv); } +/** + * intel_uc_runtime_suspend() - Suspend uC operation. + * @dev_priv: i915 device private + * + * This function invokes GuC OS suspension, makes ggtt_invalidate function to + * point to non-GuC variant, disables GuC interrupts and disable communication + * with GuC. + * + * Return: non-zero code on error + */ int intel_uc_runtime_suspend(struct drm_i915_private *dev_priv) { - return intel_guc_suspend(dev_priv); + int ret; + + if (!i915_modparams.enable_guc_loading) + return 0; + + ret = intel_guc_suspend(dev_priv); + if (ret) + goto out; + + i915_ggtt_disable_guc(dev_priv); + gen9_disable_guc_interrupts(dev_priv); + guc_disable_communication(&dev_priv->guc); + +out: + if (ret) + DRM_ERROR("uC runtime suspend failed (%d)\n", ret); + return ret; } +/** + * intel_uc_runtime_resume() - Resume uC operation. + * @dev_priv: i915 device private + * + * This function enables communication with GuC, enables GuC interrupts, + * makes ggtt_invalidate function to point to GuC variant and invokes + * GuC OS resumption. + * + * Return: non-zero code on error + */ int intel_uc_runtime_resume(struct drm_i915_private *dev_priv) { - return intel_guc_resume(dev_priv); + int ret; + + if (!i915_modparams.enable_guc_loading) + return 0; + + ret = guc_enable_communication(&dev_priv->guc); + if (ret) + goto out; + + if (i915_modparams.guc_log_level >= 0) + gen9_enable_guc_interrupts(dev_priv); + i915_ggtt_enable_guc(dev_priv); + + ret = intel_guc_resume(dev_priv); + if (ret) + goto out; + +out: + if (ret) + DRM_ERROR("uC runtime resume failed (%d)\n", ret); + return ret; } int intel_uc_suspend(struct drm_i915_private *dev_priv)