From patchwork Thu Sep 28 06:48:47 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: sagar.a.kamble@intel.com X-Patchwork-Id: 9975399 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 25DAC603F2 for ; Thu, 28 Sep 2017 06:45:53 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 16CE2291CA for ; Thu, 28 Sep 2017 06:45:53 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 0BABF29493; Thu, 28 Sep 2017 06:45:53 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 8AFEC291CA for ; Thu, 28 Sep 2017 06:45:52 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id DDDC56E862; Thu, 28 Sep 2017 06:45:51 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by gabe.freedesktop.org (Postfix) with ESMTPS id 5A30A6E861 for ; Thu, 28 Sep 2017 06:45:49 +0000 (UTC) Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 27 Sep 2017 23:45:48 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos; i="5.42,448,1500966000"; d="scan'208"; a="1019333695" Received: from sakamble-desktop.iind.intel.com ([10.223.26.118]) by orsmga003.jf.intel.com with ESMTP; 27 Sep 2017 23:45:46 -0700 From: Sagar Arun Kamble To: intel-gfx@lists.freedesktop.org Date: Thu, 28 Sep 2017 12:18:47 +0530 Message-Id: <1506581329-29720-10-git-send-email-sagar.a.kamble@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1506581329-29720-1-git-send-email-sagar.a.kamble@intel.com> References: <1506581329-29720-1-git-send-email-sagar.a.kamble@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v12 09/11] drm/i915/guc: Update GuC functionality in intel_uc_suspend/intel_uc_resume X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP With this patch we disable GuC submission in i915_drm_suspend path. This will destroy the client which will be setup back again. We also reuse the complete sanitization done via intel_uc_runtime_suspend in this path. We have added resume functionality but currently it will not be triggered as GuC is reset at the end of suspend. So we depend on intel_uc_resume post intel_uc_init_hw in i915_drm_resume. This also fixes issue where intel_uc_fini_hw was being called after GPU reset happening in i915_gem_suspend during i915_driver_unload. v2: Rebase w.r.t removal of GuC code restructuring. Added struct_mutex protection for i915_guc_submission_disable. v3: Rebase w.r.t updated GuC suspend function name. v4: Added lockdep assert in i915_guc_submission_enable/disable. Refined intel_uc_suspend to remove unnecessary locals and simplify return. (Michal Winiarski) Removed comment in guc_client_free about ignoring failure for destroy_doorbell. (Oscar) Rebase w.r.t i915_modparams change. v5: Removed lockdep assert as mutex is needed by internal functions which already have the asserts. (Chris) Removed enable_guc_submission check for disabling GuC submission. (Chris) v6: Rebase with enable_guc_submission related change done in earlier newly introduced patches. v7: Fixed intel_uc_resume to call intel_uc_runtime_resume and added comment about need to enable submission later if needed. Commit message updated. (Sagar) Signed-off-by: Sagar Arun Kamble Cc: Michal Wajdeczko Cc: Michał Winiarski Reviewed-by: Michał Winiarski --- drivers/gpu/drm/i915/i915_guc_submission.c | 3 --- drivers/gpu/drm/i915/intel_uc.c | 18 ++++++++++++++---- 2 files changed, 14 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c b/drivers/gpu/drm/i915/i915_guc_submission.c index ca6c4f9..ab1c382 100644 --- a/drivers/gpu/drm/i915/i915_guc_submission.c +++ b/drivers/gpu/drm/i915/i915_guc_submission.c @@ -885,9 +885,6 @@ static void guc_client_free(struct i915_guc_client *client) * Be sure to drop any locks */ - /* FIXME: in many cases, by the time we get here the GuC has been - * reset, so we cannot destroy the doorbell properly. Ignore the - * error message for now */ destroy_doorbell(client); guc_stage_desc_fini(client->guc, client); i915_gem_object_unpin_map(client->vma->obj); diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c index c54b302..feb149e 100644 --- a/drivers/gpu/drm/i915/intel_uc.c +++ b/drivers/gpu/drm/i915/intel_uc.c @@ -471,8 +471,6 @@ void intel_uc_fini_hw(struct drm_i915_private *dev_priv) { guc_free_load_err_log(&dev_priv->guc); - i915_guc_submission_disable(dev_priv); - guc_disable_communication(&dev_priv->guc); gen9_disable_guc_interrupts(dev_priv); @@ -550,12 +548,24 @@ int intel_uc_runtime_resume(struct drm_i915_private *dev_priv) int intel_uc_suspend(struct drm_i915_private *dev_priv) { - return intel_guc_suspend(dev_priv); + mutex_lock(&dev_priv->drm.struct_mutex); + i915_guc_submission_disable(dev_priv); + mutex_unlock(&dev_priv->drm.struct_mutex); + + return intel_uc_runtime_suspend(dev_priv); } int intel_uc_resume(struct drm_i915_private *dev_priv) { - return intel_guc_resume(dev_priv); + /* + * FIXME: intel_uc_suspend disables GuC submission. This is + * needed for unload path as well. Also, GuC is reset at the end + * of suspend which makes disabling submission post that not + * possible. Hence we re-enable submission during intel_uc_init_hw. + * Once reset at the end of suspend is removed we need to enable + * GuC submission post resuming GuC. + */ + return intel_uc_runtime_resume(dev_priv); } void intel_uc_sanitize(struct drm_i915_private *dev_priv)