From patchwork Thu Sep 28 06:48:48 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: sagar.a.kamble@intel.com X-Patchwork-Id: 9975401 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 090F0603F2 for ; Thu, 28 Sep 2017 06:45:54 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id EE955291C9 for ; Thu, 28 Sep 2017 06:45:53 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E385229491; Thu, 28 Sep 2017 06:45:53 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id A1EE6291C9 for ; Thu, 28 Sep 2017 06:45:53 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id EA3766E867; Thu, 28 Sep 2017 06:45:52 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by gabe.freedesktop.org (Postfix) with ESMTPS id 59DFF6E861 for ; Thu, 28 Sep 2017 06:45:51 +0000 (UTC) Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 27 Sep 2017 23:45:50 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos; i="5.42,448,1500966000"; d="scan'208"; a="1019333713" Received: from sakamble-desktop.iind.intel.com ([10.223.26.118]) by orsmga003.jf.intel.com with ESMTP; 27 Sep 2017 23:45:49 -0700 From: Sagar Arun Kamble To: intel-gfx@lists.freedesktop.org Date: Thu, 28 Sep 2017 12:18:48 +0530 Message-Id: <1506581329-29720-11-git-send-email-sagar.a.kamble@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1506581329-29720-1-git-send-email-sagar.a.kamble@intel.com> References: <1506581329-29720-1-git-send-email-sagar.a.kamble@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v12 10/11] drm/i915/guc: Disable GuC submission and suspend it prior to i915 reset X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Before i915 reset, we need to disable GuC submission and suspend GuC operations as it is recreated during intel_uc_init_hw. We can't reuse the intel_uc_suspend functionality as reset path already holds struct_mutex. v2: Rebase w.r.t removal of GuC code restructuring. Updated reset_prepare function as struct_mutex is not needed. v3: Fixed typo in commit message. Made return from intel_uc_reset_prepare simpler. (Michal) Rebase w.r.t i915_modparams change. v4: Rebase. Removed enable_guc_submission check for disabling GuC submission. (Chris) v5: Rebase. Signed-off-by: Sagar Arun Kamble Cc: Michal Wajdeczko Cc: Michał Winiarski Reviewed-by: Michal Wajdeczko --- drivers/gpu/drm/i915/i915_gem.c | 2 ++ drivers/gpu/drm/i915/intel_uc.c | 7 +++++++ drivers/gpu/drm/i915/intel_uc.h | 1 + 3 files changed, 10 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 1f61d9c..87351d8 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -2865,6 +2865,8 @@ int i915_gem_reset_prepare(struct drm_i915_private *dev_priv) i915_gem_revoke_fences(dev_priv); + intel_uc_reset_prepare(dev_priv); + return err; } diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c index feb149e..bb0ab1e 100644 --- a/drivers/gpu/drm/i915/intel_uc.c +++ b/drivers/gpu/drm/i915/intel_uc.c @@ -580,6 +580,13 @@ void intel_uc_sanitize(struct drm_i915_private *dev_priv) dev_priv->guc.fw.load_status = INTEL_UC_FIRMWARE_NONE; } +int intel_uc_reset_prepare(struct drm_i915_private *dev_priv) +{ + i915_guc_submission_disable(dev_priv); + + return intel_uc_runtime_suspend(dev_priv); +} + int intel_guc_send_nop(struct intel_guc *guc, const u32 *action, u32 len) { WARN(1, "Unexpected send: action=%#x\n", *action); diff --git a/drivers/gpu/drm/i915/intel_uc.h b/drivers/gpu/drm/i915/intel_uc.h index ce3cea5..330eb08 100644 --- a/drivers/gpu/drm/i915/intel_uc.h +++ b/drivers/gpu/drm/i915/intel_uc.h @@ -212,6 +212,7 @@ struct intel_huc { int intel_uc_runtime_resume(struct drm_i915_private *dev_priv); int intel_uc_suspend(struct drm_i915_private *dev_priv); int intel_uc_resume(struct drm_i915_private *dev_priv); +int intel_uc_reset_prepare(struct drm_i915_private *dev_priv); void intel_uc_sanitize(struct drm_i915_private *dev_priv); int intel_guc_sample_forcewake(struct intel_guc *guc); int intel_guc_send_nop(struct intel_guc *guc, const u32 *action, u32 len);