From patchwork Thu Sep 28 06:48:42 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: sagar.a.kamble@intel.com X-Patchwork-Id: 9975391 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 6CBE9603F2 for ; Thu, 28 Sep 2017 06:45:40 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5D95A291C9 for ; Thu, 28 Sep 2017 06:45:40 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 5287029491; Thu, 28 Sep 2017 06:45:40 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id AD43D291C9 for ; Thu, 28 Sep 2017 06:45:39 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 48E276E856; Thu, 28 Sep 2017 06:45:39 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by gabe.freedesktop.org (Postfix) with ESMTPS id 91FAF6E852 for ; Thu, 28 Sep 2017 06:45:35 +0000 (UTC) Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga105.fm.intel.com with ESMTP; 27 Sep 2017 23:45:35 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos; i="5.42,448,1500966000"; d="scan'208"; a="1019333619" Received: from sakamble-desktop.iind.intel.com ([10.223.26.118]) by orsmga003.jf.intel.com with ESMTP; 27 Sep 2017 23:45:33 -0700 From: Sagar Arun Kamble To: intel-gfx@lists.freedesktop.org Date: Thu, 28 Sep 2017 12:18:42 +0530 Message-Id: <1506581329-29720-5-git-send-email-sagar.a.kamble@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1506581329-29720-1-git-send-email-sagar.a.kamble@intel.com> References: <1506581329-29720-1-git-send-email-sagar.a.kamble@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v12 04/11] drm/i915: Create uC runtime and system suspend/resume helpers X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Prepared generic helpers intel_uc_suspend, intel_uc_resume, intel_uc_runtime_suspend, intel_uc_runtime_resume. These are called from respective GEM functions. Only exception is intel_uc_resume that needs to be called w/ or w/o GuC loaded in i915_drm_resume path. Changes to add WOPCM condition check to load GuC during resume will be added in later patches. v2: Rebase w.r.t removal of GuC code restructuring. v3: Calling intel_uc_resume from i915_gem_resume post resuming i915 gem setup. This is symmetrical with i915_gem_suspend. Removed error messages from i915 suspend/resume routines as uC suspend/resume routines will have those. (Michal Wajdeczko) Declare wedged on uc_suspend failure and uc_resume failure. (Michał Winiarski) Keeping the uC suspend/resume function definitions close to other uC functions. v4: Added implementation to intel_uc_resume as GuC resume is needed to be triggered post reloading the firmware as well. Added comments about semantics of GuC resume with the firmware reload. v5: Updated return from i915_gem_runtime_suspend. Moved the comment about GuC reload optimization to intel_uc_init_hw. (Michal Wajdeczko) Updated comments as FIXME. Signed-off-by: Sagar Arun Kamble Cc: Chris Wilson Cc: Michal Wajdeczko Cc: Michał Winiarski --- drivers/gpu/drm/i915/i915_drv.c | 12 ++++++++++++ drivers/gpu/drm/i915/i915_gem.c | 24 +++++++++++++++++++----- drivers/gpu/drm/i915/intel_uc.c | 27 +++++++++++++++++++++++++++ drivers/gpu/drm/i915/intel_uc.h | 4 ++++ 4 files changed, 62 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index a9821ae..66701ee 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -1698,6 +1698,18 @@ static int i915_drm_resume(struct drm_device *dev) } mutex_unlock(&dev->struct_mutex); + /* + * FIXME: Currently we know that at the end of suspend we have done Full + * GPU reset and GuC is loaded again during i915_gem_init_hw. + * Now, send action to GuC to resume back again as earlier call to + * intel_uc_resume from i915_gem_resume would have done nothing. + * This needs to be skipped if GuC was not loaded during resume as + * intel_uc_resume would have been already called from i915_gem_resume. + */ + ret = intel_uc_resume(dev_priv); + if (ret) + i915_gem_set_wedged(dev_priv); + intel_modeset_init_hw(dev); spin_lock_irq(&dev_priv->irq_lock); diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 889b35f..1f61d9c 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -2025,9 +2025,11 @@ int i915_gem_fault(struct vm_fault *vmf) int i915_gem_runtime_suspend(struct drm_i915_private *dev_priv) { struct drm_i915_gem_object *obj, *on; - int i; + int i, ret; - intel_guc_suspend(dev_priv); + ret = intel_uc_runtime_suspend(dev_priv); + if (ret) + return ret; /* * Only called during RPM suspend. All users of the userfault_list @@ -2080,7 +2082,7 @@ void i915_gem_runtime_resume(struct drm_i915_private *dev_priv) i915_gem_init_swizzling(dev_priv); i915_gem_restore_fences(dev_priv); - intel_guc_resume(dev_priv); + intel_uc_runtime_resume(dev_priv); } static int i915_gem_object_create_mmap_offset(struct drm_i915_gem_object *obj) @@ -4571,7 +4573,9 @@ int i915_gem_suspend(struct drm_i915_private *dev_priv) if (WARN_ON(!intel_engines_are_idle(dev_priv))) i915_gem_set_wedged(dev_priv); /* no hope, discard everything */ - intel_guc_suspend(dev_priv); + ret = intel_uc_suspend(dev_priv); + if (ret) + i915_gem_set_wedged(dev_priv); /* no hope, discard everything */ /* * Neither the BIOS, ourselves or any other kernel @@ -4606,6 +4610,7 @@ int i915_gem_suspend(struct drm_i915_private *dev_priv) int i915_gem_resume(struct drm_i915_private *dev_priv) { struct drm_device *dev = &dev_priv->drm; + int ret; WARN_ON(dev_priv->gt.awake); @@ -4619,7 +4624,16 @@ int i915_gem_resume(struct drm_i915_private *dev_priv) */ dev_priv->gt.resume(dev_priv); - intel_guc_resume(dev_priv); + /* + * FIXME: At the end of suspend, Full GPU reset is done which unloads + * the GuC firmware. If reset is avoided there, we can check the WOPCM + * status here to see if GuC is still loaded and just do GuC resume + * without reloading the firmware back. + */ + ret = intel_uc_resume(dev_priv); + if (ret) + i915_gem_set_wedged(dev_priv); + mutex_unlock(&dev->struct_mutex); return 0; diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c index 2774778..80251ec 100644 --- a/drivers/gpu/drm/i915/intel_uc.c +++ b/drivers/gpu/drm/i915/intel_uc.c @@ -373,6 +373,13 @@ int intel_uc_init_hw(struct drm_i915_private *dev_priv) goto err_guc; } + /* + * FIXME: Currently, GuC is loaded unconditionally without checking + * if it is already available in WOPCM (generally available after resume + * from sleep state). We can skip the load based on WOPCM status (To be + * decided based on bit 0 of GUC_WOPCM_SIZE). + */ + /* init WOPCM */ I915_WRITE(GUC_WOPCM_SIZE, intel_guc_wopcm_size(dev_priv)); I915_WRITE(DMA_GUC_WOPCM_OFFSET, @@ -481,6 +488,26 @@ void intel_uc_fini_hw(struct drm_i915_private *dev_priv) i915_ggtt_disable_guc(dev_priv); } +int intel_uc_runtime_suspend(struct drm_i915_private *dev_priv) +{ + return intel_guc_suspend(dev_priv); +} + +int intel_uc_runtime_resume(struct drm_i915_private *dev_priv) +{ + return intel_guc_resume(dev_priv); +} + +int intel_uc_suspend(struct drm_i915_private *dev_priv) +{ + return intel_guc_suspend(dev_priv); +} + +int intel_uc_resume(struct drm_i915_private *dev_priv) +{ + return intel_guc_resume(dev_priv); +} + int intel_guc_send_nop(struct intel_guc *guc, const u32 *action, u32 len) { WARN(1, "Unexpected send: action=%#x\n", *action); diff --git a/drivers/gpu/drm/i915/intel_uc.h b/drivers/gpu/drm/i915/intel_uc.h index 6966349..0a79e17 100644 --- a/drivers/gpu/drm/i915/intel_uc.h +++ b/drivers/gpu/drm/i915/intel_uc.h @@ -208,6 +208,10 @@ struct intel_huc { void intel_uc_fini_fw(struct drm_i915_private *dev_priv); int intel_uc_init_hw(struct drm_i915_private *dev_priv); void intel_uc_fini_hw(struct drm_i915_private *dev_priv); +int intel_uc_runtime_suspend(struct drm_i915_private *dev_priv); +int intel_uc_runtime_resume(struct drm_i915_private *dev_priv); +int intel_uc_suspend(struct drm_i915_private *dev_priv); +int intel_uc_resume(struct drm_i915_private *dev_priv); int intel_guc_sample_forcewake(struct intel_guc *guc); int intel_guc_send_nop(struct intel_guc *guc, const u32 *action, u32 len); int intel_guc_send_mmio(struct intel_guc *guc, const u32 *action, u32 len);