From patchwork Thu Sep 28 06:48:44 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: sagar.a.kamble@intel.com X-Patchwork-Id: 9975393 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 6FDB2603F2 for ; Thu, 28 Sep 2017 06:45:43 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 60FE8291C9 for ; Thu, 28 Sep 2017 06:45:43 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 55E8729491; Thu, 28 Sep 2017 06:45:43 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id EC145291C9 for ; Thu, 28 Sep 2017 06:45:42 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 9F60D6E858; Thu, 28 Sep 2017 06:45:42 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by gabe.freedesktop.org (Postfix) with ESMTPS id 2F3EB6E855 for ; Thu, 28 Sep 2017 06:45:39 +0000 (UTC) Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga105.fm.intel.com with ESMTP; 27 Sep 2017 23:45:38 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos; i="5.42,448,1500966000"; d="scan'208"; a="1019333641" Received: from sakamble-desktop.iind.intel.com ([10.223.26.118]) by orsmga003.jf.intel.com with ESMTP; 27 Sep 2017 23:45:37 -0700 From: Sagar Arun Kamble To: intel-gfx@lists.freedesktop.org Date: Thu, 28 Sep 2017 12:18:44 +0530 Message-Id: <1506581329-29720-7-git-send-email-sagar.a.kamble@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1506581329-29720-1-git-send-email-sagar.a.kamble@intel.com> References: <1506581329-29720-1-git-send-email-sagar.a.kamble@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v12 06/11] drm/i915/guc: Make GuC related disable/destroy functions not depend on i915.enable_guc_submission X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP During GuC load/enable, state is setup by driver that can be looked at while disabling. So remove the check for i915.enable_guc_submission parameter in those functions. Suggested-by: Chris Wilson Signed-off-by: Sagar Arun Kamble Cc: Michal Wajdeczko Cc: Michał Winiarski --- drivers/gpu/drm/i915/i915_guc_submission.c | 13 ++++++++++--- drivers/gpu/drm/i915/i915_irq.c | 6 ++++++ drivers/gpu/drm/i915/intel_guc_log.c | 6 ++---- drivers/gpu/drm/i915/intel_uc.c | 12 ++++-------- 4 files changed, 22 insertions(+), 15 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c b/drivers/gpu/drm/i915/i915_guc_submission.c index 04f1281..a2f67ca 100644 --- a/drivers/gpu/drm/i915/i915_guc_submission.c +++ b/drivers/gpu/drm/i915/i915_guc_submission.c @@ -1002,7 +1002,8 @@ static int guc_ads_create(struct intel_guc *guc) static void guc_ads_destroy(struct intel_guc *guc) { - i915_vma_unpin_and_release(&guc->ads_vma); + if (guc->ads_vma) + i915_vma_unpin_and_release(&guc->ads_vma); } /* @@ -1060,11 +1061,14 @@ void i915_guc_submission_fini(struct drm_i915_private *dev_priv) { struct intel_guc *guc = &dev_priv->guc; + WARN_ON_ONCE(!ida_is_empty(&guc->stage_ids)); ida_destroy(&guc->stage_ids); guc_ads_destroy(guc); intel_guc_log_destroy(guc); - i915_gem_object_unpin_map(guc->stage_desc_pool->obj); - i915_vma_unpin_and_release(&guc->stage_desc_pool); + if (guc->stage_desc_pool) { + i915_gem_object_unpin_map(guc->stage_desc_pool->obj); + i915_vma_unpin_and_release(&guc->stage_desc_pool); + } } static void guc_interrupts_capture(struct drm_i915_private *dev_priv) @@ -1204,6 +1208,9 @@ void i915_guc_submission_disable(struct drm_i915_private *dev_priv) { struct intel_guc *guc = &dev_priv->guc; + if (!guc->execbuf_client) + return; + guc_interrupts_release(dev_priv); /* Revert back to manual ELSP submission */ diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 0b756213..75406ee 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -455,6 +455,9 @@ void gen9_reset_guc_interrupts(struct drm_i915_private *dev_priv) void gen9_enable_guc_interrupts(struct drm_i915_private *dev_priv) { + if (READ_ONCE(dev_priv->guc.interrupts_enabled)) + return; + spin_lock_irq(&dev_priv->irq_lock); if (!dev_priv->guc.interrupts_enabled) { WARN_ON_ONCE(I915_READ(gen6_pm_iir(dev_priv)) & @@ -467,6 +470,9 @@ void gen9_enable_guc_interrupts(struct drm_i915_private *dev_priv) void gen9_disable_guc_interrupts(struct drm_i915_private *dev_priv) { + if (!READ_ONCE(dev_priv->guc.interrupts_enabled)) + return; + spin_lock_irq(&dev_priv->irq_lock); dev_priv->guc.interrupts_enabled = false; diff --git a/drivers/gpu/drm/i915/intel_guc_log.c b/drivers/gpu/drm/i915/intel_guc_log.c index 6571d96..73333b6 100644 --- a/drivers/gpu/drm/i915/intel_guc_log.c +++ b/drivers/gpu/drm/i915/intel_guc_log.c @@ -584,7 +584,8 @@ int intel_guc_log_create(struct intel_guc *guc) void intel_guc_log_destroy(struct intel_guc *guc) { guc_log_runtime_destroy(guc); - i915_vma_unpin_and_release(&guc->log.vma); + if (guc->log.vma) + i915_vma_unpin_and_release(&guc->log.vma); } int i915_guc_log_control(struct drm_i915_private *dev_priv, u64 control_val) @@ -653,9 +654,6 @@ void i915_guc_log_register(struct drm_i915_private *dev_priv) void i915_guc_log_unregister(struct drm_i915_private *dev_priv) { - if (!i915_modparams.enable_guc_submission) - return; - mutex_lock(&dev_priv->drm.struct_mutex); /* GuC logging is currently the only user of Guc2Host interrupts */ gen9_disable_guc_interrupts(dev_priv); diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c index ab26232..ea7c39c 100644 --- a/drivers/gpu/drm/i915/intel_uc.c +++ b/drivers/gpu/drm/i915/intel_uc.c @@ -445,8 +445,7 @@ int intel_uc_init_hw(struct drm_i915_private *dev_priv) err_log_capture: guc_capture_load_err_log(guc); err_submission: - if (i915_modparams.enable_guc_submission) - i915_guc_submission_fini(dev_priv); + i915_guc_submission_fini(dev_priv); err_guc: i915_ggtt_disable_guc(dev_priv); @@ -475,15 +474,12 @@ void intel_uc_fini_hw(struct drm_i915_private *dev_priv) if (!i915_modparams.enable_guc_loading) return; - if (i915_modparams.enable_guc_submission) - i915_guc_submission_disable(dev_priv); + i915_guc_submission_disable(dev_priv); guc_disable_communication(&dev_priv->guc); - if (i915_modparams.enable_guc_submission) { - gen9_disable_guc_interrupts(dev_priv); - i915_guc_submission_fini(dev_priv); - } + gen9_disable_guc_interrupts(dev_priv); + i915_guc_submission_fini(dev_priv); i915_ggtt_disable_guc(dev_priv); }