diff mbox

[5/5] drm/i915/guc : Fixing argument type warning.

Message ID 1507071441-23409-1-git-send-email-sujaritha.sundaresan@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Sundaresan, Sujaritha Oct. 3, 2017, 10:57 p.m. UTC
Reverting argument type (struct intel_guc *guc) to expected type due to warning.

Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Oscar Mateo <oscar.mateo@intel.com>
Cc: Sagar Arun Kamble <sagar.a.kamble@intel.com>

Signed-off-by: Sujaritha Sundaresan <sujaritha.sundaresan@intel.com>
---
 drivers/gpu/drm/i915/i915_guc_submission.c | 7 +++++--
 drivers/gpu/drm/i915/intel_uc.h            | 4 ++--
 2 files changed, 7 insertions(+), 4 deletions(-)

Comments

Michal Wajdeczko Oct. 4, 2017, 2:02 p.m. UTC | #1
On Wed, 04 Oct 2017 00:57:21 +0200, Sujaritha Sundaresan  
<sujaritha.sundaresan@intel.com> wrote:

> Reverting argument type (struct intel_guc *guc) to expected type due to  
> warning.

Please refactor your patches to avoid sending reverts in same patch series

>
> Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: Oscar Mateo <oscar.mateo@intel.com>
> Cc: Sagar Arun Kamble <sagar.a.kamble@intel.com>
>
> Signed-off-by: Sujaritha Sundaresan <sujaritha.sundaresan@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_guc_submission.c | 7 +++++--
>  drivers/gpu/drm/i915/intel_uc.h            | 4 ++--
>  2 files changed, 7 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c  
> b/drivers/gpu/drm/i915/i915_guc_submission.c
> index a351339..0db1291 100644
> --- a/drivers/gpu/drm/i915/i915_guc_submission.c
> +++ b/drivers/gpu/drm/i915/i915_guc_submission.c
> @@ -920,8 +920,9 @@ void i915_guc_policies_init(struct guc_policies  
> *policies)
>   * Set up the memory resources to be shared with the GuC (via the GGTT)
>   * at firmware loading time.
>   */
> -int i915_guc_submission_shared_objects_init(struct intel_guc *guc)
> +int i915_guc_submission_shared_objects_init(struct drm_i915_private  
> *dev_priv)
>  {
> +	struct intel_guc *guc = &dev_priv->guc;
>  	struct i915_vma *vma;
>  	void *vaddr;
> @@ -949,8 +950,10 @@ int i915_guc_submission_shared_objects_init(struct  
> intel_guc *guc)
>  	return 0;
>  }
> -void i915_guc_submission_shared_objects_fini(struct intel_guc *guc)
> +void i915_guc_submission_shared_objects_fini(struct drm_i915_private  
> *dev_priv)
>  {
> +	struct intel_guc *guc = &dev_priv->guc;
> +
>  	ida_destroy(&guc->stage_ids);
>  	i915_gem_object_unpin_map(guc->stage_desc_pool->obj);
>  	i915_vma_unpin_and_release(&guc->stage_desc_pool);
> diff --git a/drivers/gpu/drm/i915/intel_uc.h  
> b/drivers/gpu/drm/i915/intel_uc.h
> index 5106046..7a6c9b1 100644
> --- a/drivers/gpu/drm/i915/intel_uc.h
> +++ b/drivers/gpu/drm/i915/intel_uc.h
> @@ -230,10 +230,10 @@ static inline void intel_guc_notify(struct  
> intel_guc *guc)
>  u32 intel_guc_wopcm_size(struct drm_i915_private *dev_priv);
> /* i915_guc_submission.c */
> -int i915_guc_submission_shared_objects_init(struct intel_guc *guc);
> +int i915_guc_submission_shared_objects_init(struct drm_i915_private  
> *dev_priv);
>  int i915_guc_submission_enable(struct drm_i915_private *dev_priv);
>  void i915_guc_submission_disable(struct drm_i915_private *dev_priv);
> -void i915_guc_submission_shared_objects_fini(struct intel_guc *guc);
> +void i915_guc_submission_shared_objects_fini(struct drm_i915_private  
> *dev_priv);
>  struct i915_vma *intel_guc_allocate_vma(struct intel_guc *guc, u32  
> size);
>  void i915_guc_policies_init(struct guc_policies *policies);
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c b/drivers/gpu/drm/i915/i915_guc_submission.c
index a351339..0db1291 100644
--- a/drivers/gpu/drm/i915/i915_guc_submission.c
+++ b/drivers/gpu/drm/i915/i915_guc_submission.c
@@ -920,8 +920,9 @@  void i915_guc_policies_init(struct guc_policies *policies)
  * Set up the memory resources to be shared with the GuC (via the GGTT)
  * at firmware loading time.
  */
-int i915_guc_submission_shared_objects_init(struct intel_guc *guc)
+int i915_guc_submission_shared_objects_init(struct drm_i915_private *dev_priv)
 {
+	struct intel_guc *guc = &dev_priv->guc;
 	struct i915_vma *vma;
 	void *vaddr;
 
@@ -949,8 +950,10 @@  int i915_guc_submission_shared_objects_init(struct intel_guc *guc)
 	return 0;
 }
 
-void i915_guc_submission_shared_objects_fini(struct intel_guc *guc)
+void i915_guc_submission_shared_objects_fini(struct drm_i915_private *dev_priv)
 {
+	struct intel_guc *guc = &dev_priv->guc;
+
 	ida_destroy(&guc->stage_ids);
 	i915_gem_object_unpin_map(guc->stage_desc_pool->obj);
 	i915_vma_unpin_and_release(&guc->stage_desc_pool);
diff --git a/drivers/gpu/drm/i915/intel_uc.h b/drivers/gpu/drm/i915/intel_uc.h
index 5106046..7a6c9b1 100644
--- a/drivers/gpu/drm/i915/intel_uc.h
+++ b/drivers/gpu/drm/i915/intel_uc.h
@@ -230,10 +230,10 @@  static inline void intel_guc_notify(struct intel_guc *guc)
 u32 intel_guc_wopcm_size(struct drm_i915_private *dev_priv);
 
 /* i915_guc_submission.c */
-int i915_guc_submission_shared_objects_init(struct intel_guc *guc);
+int i915_guc_submission_shared_objects_init(struct drm_i915_private *dev_priv);
 int i915_guc_submission_enable(struct drm_i915_private *dev_priv);
 void i915_guc_submission_disable(struct drm_i915_private *dev_priv);
-void i915_guc_submission_shared_objects_fini(struct intel_guc *guc);
+void i915_guc_submission_shared_objects_fini(struct drm_i915_private *dev_priv);
 struct i915_vma *intel_guc_allocate_vma(struct intel_guc *guc, u32 size);
 void i915_guc_policies_init(struct guc_policies *policies);