From patchwork Wed Oct 11 08:54:05 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: sagar.a.kamble@intel.com X-Patchwork-Id: 9999047 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id BD1AF602BF for ; Wed, 11 Oct 2017 08:51:23 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id AD66A2896F for ; Wed, 11 Oct 2017 08:51:23 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A24E728972; Wed, 11 Oct 2017 08:51:23 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 3B8BB2896F for ; Wed, 11 Oct 2017 08:51:23 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8B4356E609; Wed, 11 Oct 2017 08:51:22 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by gabe.freedesktop.org (Postfix) with ESMTPS id 5DA9A6E603 for ; Wed, 11 Oct 2017 08:51:19 +0000 (UTC) Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 11 Oct 2017 01:51:19 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos; i="5.43,360,1503385200"; d="scan'208"; a="1204581469" Received: from sakamble-desktop.iind.intel.com ([10.223.26.118]) by fmsmga001.fm.intel.com with ESMTP; 11 Oct 2017 01:51:17 -0700 From: Sagar Arun Kamble To: intel-gfx@lists.freedesktop.org Date: Wed, 11 Oct 2017 14:24:05 +0530 Message-Id: <1507712056-25030-11-git-send-email-sagar.a.kamble@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1507712056-25030-1-git-send-email-sagar.a.kamble@intel.com> References: <1507712056-25030-1-git-send-email-sagar.a.kamble@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v13 10/21] drm/i915/guc: Update uC suspend/resume function separating Host/GuC tasks X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Suspending GuC involves bunch of tasks controlled by GuC OS and some controlled by Host OS. Host needs to disable submission to GuC and any other GuC functions. Then, GuC's task is initiated by Host sending action to GuC to enter sleep state. On this action, GuC preempts engines to idle context and then saves internal state to a buffer. It also disables internal interrupts/timers to avoid any wake-ups. After this, Host should disable GuC interrupts, communication with GuC (intel_guc_send/notify). GGTT invalidate update will have to be done in conjunction with GTT related suspend/resume tasks. v2: Rebase w.r.t removal of GuC code restructuring. v3: Removed GuC specific helpers as tasks other than send H2G for sleep/resume are to be done from uc generic functions. (Michal Wajdeczko) v4: Simplified/Unified the error messaging in uc_runtime_suspend/resume. (Michal Wajdeczko). Rebase w.r.t i915_modparams change. Added documentation to intel_uc_runtime_suspend/resume. v5: Removed enable_guc_loading based check from intel_uc_runtime_suspend and intel_uc_runtime_resume and pulled FW load_status based checks from intel_guc_suspend/resume into these functions. (Michal Wajdeczko) v6: Adjusted intel_uc_runtime_resume with prototype change to not return value. v7: Rebase. v8: Updated commit description and added submission enable/disable in GuC suspend/resume paths. Removed GGTT invalidate update functions. Signed-off-by: Sagar Arun Kamble Cc: Chris Wilson Cc: Michal Wajdeczko Cc: Michał Winiarski Cc: Joonas Lahtinen Reviewed-by: Michal Wajdeczko #6 --- drivers/gpu/drm/i915/intel_guc.c | 11 ------- drivers/gpu/drm/i915/intel_uc.c | 65 +++++++++++++++++++++++++++++++++++++--- 2 files changed, 61 insertions(+), 15 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_guc.c b/drivers/gpu/drm/i915/intel_guc.c index 9a2df69..55a0158 100644 --- a/drivers/gpu/drm/i915/intel_guc.c +++ b/drivers/gpu/drm/i915/intel_guc.c @@ -177,11 +177,6 @@ int intel_guc_suspend(struct intel_guc *guc) struct i915_gem_context *ctx; u32 data[3]; - if (guc->fw.load_status != INTEL_UC_FIRMWARE_SUCCESS) - return 0; - - gen9_disable_guc_interrupts(i915); - ctx = i915->kernel_context; data[0] = INTEL_GUC_ACTION_ENTER_S_STATE; @@ -204,12 +199,6 @@ int intel_guc_resume(struct intel_guc *guc) struct i915_gem_context *ctx; u32 data[3]; - if (guc->fw.load_status != INTEL_UC_FIRMWARE_SUCCESS) - return 0; - - if (i915_modparams.guc_log_level >= 0) - gen9_enable_guc_interrupts(i915); - ctx = i915->kernel_context; data[0] = INTEL_GUC_ACTION_EXIT_S_STATE; diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c index b5c132c..297a321 100644 --- a/drivers/gpu/drm/i915/intel_uc.c +++ b/drivers/gpu/drm/i915/intel_uc.c @@ -284,18 +284,75 @@ void intel_uc_fini_hw(struct drm_i915_private *dev_priv) i915_ggtt_disable_guc(dev_priv); } +/** + * intel_uc_suspend() - Suspend uC operation. + * @dev_priv: i915 device private + * + * This function disables GuC submission, invokes GuC OS suspension, + * disables GuC interrupts and disable communication with GuC. + * + * Return: non-zero code on error + */ int intel_uc_suspend(struct drm_i915_private *dev_priv) { - int ret; + struct intel_guc *guc = &dev_priv->guc; + int ret = 0; + + if (guc->fw.load_status != INTEL_UC_FIRMWARE_SUCCESS) + goto out; + + i915_guc_submission_disable(dev_priv); - ret = intel_guc_suspend(&dev_priv->guc); + ret = intel_guc_suspend(guc); if (ret) - DRM_ERROR("Failed to suspend GuC\n"); + goto out_suspend; + + gen9_disable_guc_interrupts(dev_priv); + guc_disable_communication(guc); + + goto out; + +out_suspend: + i915_guc_submission_enable(dev_priv); +out: + if (ret) + DRM_ERROR("uC Suspend failed (%d)\n", ret); return ret; } +/** + * intel_uc_resume() - Resume uC operation. + * @dev_priv: i915 device private + * + * This function enables communication with GuC, enables GuC interrupts, + * invokes GuC OS resumption and enables GuC submission. + */ void intel_uc_resume(struct drm_i915_private *dev_priv) { - intel_guc_resume(&dev_priv->guc); + struct intel_guc *guc = &dev_priv->guc; + int ret; + + if (guc->fw.load_status != INTEL_UC_FIRMWARE_SUCCESS) + return; + + ret = guc_enable_communication(guc); + if (ret) { + DRM_DEBUG_DRIVER("GuC communication enable failed (%d)\n", ret); + return; + } + + if (i915_modparams.guc_log_level >= 0) + gen9_enable_guc_interrupts(dev_priv); + + ret = intel_guc_resume(guc); + if (ret) + DRM_ERROR("GuC resume failed (%d)." + "GuC functions may not work\n", ret); + + i915_guc_submission_enable(dev_priv); + + DRM_DEBUG_DRIVER("GuC submission %s\n", + i915_guc_submission_enabled(guc) ? + "enabled" : "disabled"); }