From patchwork Wed Oct 18 06:47:02 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: sagar.a.kamble@intel.com X-Patchwork-Id: 10013517 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 40100602C8 for ; Wed, 18 Oct 2017 06:44:09 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 32DAE28AD1 for ; Wed, 18 Oct 2017 06:44:09 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 27AEB28AD4; Wed, 18 Oct 2017 06:44:09 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id C0CA028AD1 for ; Wed, 18 Oct 2017 06:44:08 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 6FA446E7F8; Wed, 18 Oct 2017 06:44:08 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTPS id 1D5BD6E7F8 for ; Wed, 18 Oct 2017 06:44:03 +0000 (UTC) Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 17 Oct 2017 23:44:02 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.43,394,1503385200"; d="scan'208";a="161751283" Received: from sakamble-desktop.iind.intel.com ([10.223.26.118]) by orsmga005.jf.intel.com with ESMTP; 17 Oct 2017 23:44:00 -0700 From: Sagar Arun Kamble To: intel-gfx@lists.freedesktop.org Date: Wed, 18 Oct 2017 12:17:02 +0530 Message-Id: <1508309222-26406-12-git-send-email-sagar.a.kamble@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1508309222-26406-1-git-send-email-sagar.a.kamble@intel.com> References: <1508309222-26406-1-git-send-email-sagar.a.kamble@intel.com> Subject: [Intel-gfx] [PATCH 11/11] drm/i915/guc: Restore GuC interrupts across suspend/reset if enabled X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP In order to override the disable/enable control of GuC interrupts during suspend/reset cycle we are creating two new functions suspend/restore guc_interrupts which check if interrupts were enabled and disable them on suspend and enable them on resume. They are used to restore interrupts across reset as well. Signed-off-by: Sagar Arun Kamble Cc: Michal Wajdeczko Cc: Daniele Ceraolo Spurio Cc: Tvrtko Ursulin Cc: Chris Wilson Cc: Joonas Lahtinen --- drivers/gpu/drm/i915/intel_display.c | 2 ++ drivers/gpu/drm/i915/intel_guc.c | 40 ++++++++++++++++++++++++++++++++---- drivers/gpu/drm/i915/intel_guc.h | 2 ++ 3 files changed, 40 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 897fe7e..742ab5e 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -3768,8 +3768,10 @@ void intel_finish_reset(struct drm_i915_private *dev_priv) * The display has been reset as well, * so need a full re-initialization. */ + intel_suspend_guc_interrupts(&dev_priv->guc); intel_runtime_pm_disable_interrupts(dev_priv); intel_runtime_pm_enable_interrupts(dev_priv); + intel_restore_guc_interrupts(&dev_priv->guc); intel_pps_unlock_regs_wa(dev_priv); intel_modeset_init_hw(dev); diff --git a/drivers/gpu/drm/i915/intel_guc.c b/drivers/gpu/drm/i915/intel_guc.c index fbd27ea..1e5abf2 100644 --- a/drivers/gpu/drm/i915/intel_guc.c +++ b/drivers/gpu/drm/i915/intel_guc.c @@ -261,6 +261,25 @@ int intel_guc_auth_huc(struct intel_guc *guc, u32 rsa_offset) return intel_guc_send(guc, action, ARRAY_SIZE(action)); } +void intel_suspend_guc_interrupts(struct intel_guc *guc) +{ + struct drm_i915_private *dev_priv = guc_to_i915(guc); + + spin_lock_irq(&dev_priv->irq_lock); + + if (!guc->interrupt_clients) { + spin_unlock_irq(&dev_priv->irq_lock); + return; + } + + gen6_disable_pm_irq(dev_priv, dev_priv->pm_guc_events); + + spin_unlock_irq(&dev_priv->irq_lock); + synchronize_irq(dev_priv->drm.irq); + + intel_reset_guc_interrupts(guc); +} + /** * intel_guc_suspend() - notify GuC entering suspend state * @dev_priv: i915 device private @@ -274,8 +293,7 @@ int intel_guc_suspend(struct drm_i915_private *dev_priv) if (guc->fw.load_status != INTEL_UC_FIRMWARE_SUCCESS) return 0; - if (i915_modparams.guc_log_level >= 0) - intel_put_guc_interrupts(guc, GUC_INTR_CLIENT_LOG); + intel_suspend_guc_interrupts(guc); ctx = dev_priv->kernel_context; @@ -289,6 +307,21 @@ int intel_guc_suspend(struct drm_i915_private *dev_priv) return intel_guc_send(guc, data, ARRAY_SIZE(data)); } +void intel_restore_guc_interrupts(struct intel_guc *guc) +{ + struct drm_i915_private *dev_priv = guc_to_i915(guc); + + spin_lock_irq(&dev_priv->irq_lock); + + if (guc->interrupt_clients) { + WARN_ON_ONCE(I915_READ(gen6_pm_iir(dev_priv)) & + dev_priv->pm_guc_events); + gen6_enable_pm_irq(dev_priv, dev_priv->pm_guc_events); + } + + spin_unlock_irq(&dev_priv->irq_lock); +} + /** * intel_guc_resume() - notify GuC resuming from suspend state * @dev_priv: i915 device private @@ -302,8 +335,7 @@ int intel_guc_resume(struct drm_i915_private *dev_priv) if (guc->fw.load_status != INTEL_UC_FIRMWARE_SUCCESS) return 0; - if (i915_modparams.guc_log_level >= 0) - intel_get_guc_interrupts(guc, GUC_INTR_CLIENT_LOG); + intel_restore_guc_interrupts(guc); ctx = dev_priv->kernel_context; diff --git a/drivers/gpu/drm/i915/intel_guc.h b/drivers/gpu/drm/i915/intel_guc.h index 4d58bf7..c55dcba 100644 --- a/drivers/gpu/drm/i915/intel_guc.h +++ b/drivers/gpu/drm/i915/intel_guc.h @@ -125,5 +125,7 @@ static inline u32 guc_ggtt_offset(struct i915_vma *vma) void intel_get_guc_interrupts(struct intel_guc *guc, enum guc_intr_client id); void intel_put_guc_interrupts(struct intel_guc *guc, enum guc_intr_client id); void intel_guc_irq_handler(struct intel_guc *guc, u32 pm_iir); +void intel_suspend_guc_interrupts(struct intel_guc *guc); +void intel_restore_guc_interrupts(struct intel_guc *guc); #endif