| Message ID | 1508309222-26406-4-git-send-email-sagar.a.kamble@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On 18/10/2017 07:46, Sagar Arun Kamble wrote: > GuC interrupts handling functions are GuC specific functions hence update > the parameter from dev_priv to intel_guc struct. > > Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com> > Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> > Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> > Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> > Cc: Chris Wilson <chris@chris-wilson.co.uk> > Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> > --- > drivers/gpu/drm/i915/i915_irq.c | 2 +- > drivers/gpu/drm/i915/intel_guc.c | 22 +++++++++++++++------- > drivers/gpu/drm/i915/intel_guc.h | 8 ++++---- > drivers/gpu/drm/i915/intel_guc_log.c | 8 +++----- > drivers/gpu/drm/i915/intel_uc.c | 8 ++++---- > 5 files changed, 27 insertions(+), 21 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c > index 84a4bf3..1a5c026 100644 > --- a/drivers/gpu/drm/i915/i915_irq.c > +++ b/drivers/gpu/drm/i915/i915_irq.c > @@ -1441,7 +1441,7 @@ static void gen8_gt_irq_handler(struct drm_i915_private *dev_priv, > gen6_rps_irq_handler(dev_priv, gt_iir[2]); > > if (gt_iir[2] & dev_priv->pm_guc_events) > - intel_guc_irq_handler(dev_priv, gt_iir[2]); > + intel_guc_irq_handler(&dev_priv->guc, gt_iir[2]); > } > > static bool bxt_port_hotplug_long_detect(enum port port, u32 val) > diff --git a/drivers/gpu/drm/i915/intel_guc.c b/drivers/gpu/drm/i915/intel_guc.c > index 3a64ae1..31f25e5 100644 > --- a/drivers/gpu/drm/i915/intel_guc.c > +++ b/drivers/gpu/drm/i915/intel_guc.c > @@ -274,7 +274,7 @@ int intel_guc_suspend(struct drm_i915_private *dev_priv) > if (guc->fw.load_status != INTEL_UC_FIRMWARE_SUCCESS) > return 0; > > - intel_disable_guc_interrupts(dev_priv); > + intel_disable_guc_interrupts(guc); > > ctx = dev_priv->kernel_context; > > @@ -302,7 +302,7 @@ int intel_guc_resume(struct drm_i915_private *dev_priv) > return 0; > > if (i915_modparams.guc_log_level >= 0) > - intel_enable_guc_interrupts(dev_priv); > + intel_enable_guc_interrupts(guc); > > ctx = dev_priv->kernel_context; > > @@ -368,15 +368,19 @@ u32 intel_guc_wopcm_size(struct drm_i915_private *dev_priv) > return wopcm_size; > } > > -void intel_reset_guc_interrupts(struct drm_i915_private *dev_priv) > +void intel_reset_guc_interrupts(struct intel_guc *guc) > { > + struct drm_i915_private *dev_priv = guc_to_i915(guc); > + > spin_lock_irq(&dev_priv->irq_lock); > gen6_reset_pm_iir(dev_priv, dev_priv->pm_guc_events); > spin_unlock_irq(&dev_priv->irq_lock); > } > > -void intel_enable_guc_interrupts(struct drm_i915_private *dev_priv) > +void intel_enable_guc_interrupts(struct intel_guc *guc) > { > + struct drm_i915_private *dev_priv = guc_to_i915(guc); > + > spin_lock_irq(&dev_priv->irq_lock); > if (!dev_priv->guc.interrupts_enabled) { > WARN_ON_ONCE(I915_READ(gen6_pm_iir(dev_priv)) & > @@ -387,8 +391,10 @@ void intel_enable_guc_interrupts(struct drm_i915_private *dev_priv) > spin_unlock_irq(&dev_priv->irq_lock); > } > > -void intel_disable_guc_interrupts(struct drm_i915_private *dev_priv) > +void intel_disable_guc_interrupts(struct intel_guc *guc) > { > + struct drm_i915_private *dev_priv = guc_to_i915(guc); > + > spin_lock_irq(&dev_priv->irq_lock); > dev_priv->guc.interrupts_enabled = false; > > @@ -397,11 +403,13 @@ void intel_disable_guc_interrupts(struct drm_i915_private *dev_priv) > spin_unlock_irq(&dev_priv->irq_lock); > synchronize_irq(dev_priv->drm.irq); > > - intel_reset_guc_interrupts(dev_priv); > + intel_reset_guc_interrupts(guc); > } > > -void intel_guc_irq_handler(struct drm_i915_private *dev_priv, u32 gt_iir) > +void intel_guc_irq_handler(struct intel_guc *guc, u32 gt_iir) > { > + struct drm_i915_private *dev_priv = guc_to_i915(guc); > + > if (gt_iir & GEN9_GUC_TO_HOST_INT_EVENT) { > /* Sample the log buffer flush related bits & clear them out now > * itself from the message identity register to minimize the > diff --git a/drivers/gpu/drm/i915/intel_guc.h b/drivers/gpu/drm/i915/intel_guc.h > index 8b26505..e89b4ae 100644 > --- a/drivers/gpu/drm/i915/intel_guc.h > +++ b/drivers/gpu/drm/i915/intel_guc.h > @@ -116,9 +116,9 @@ static inline u32 guc_ggtt_offset(struct i915_vma *vma) > int intel_guc_resume(struct drm_i915_private *dev_priv); > struct i915_vma *intel_guc_allocate_vma(struct intel_guc *guc, u32 size); > u32 intel_guc_wopcm_size(struct drm_i915_private *dev_priv); > -void intel_reset_guc_interrupts(struct drm_i915_private *dev_priv); > -void intel_enable_guc_interrupts(struct drm_i915_private *dev_priv); > -void intel_disable_guc_interrupts(struct drm_i915_private *dev_priv); > -void intel_guc_irq_handler(struct drm_i915_private *dev_priv, u32 pm_iir); > +void intel_reset_guc_interrupts(struct intel_guc *guc); > +void intel_enable_guc_interrupts(struct intel_guc *guc); > +void intel_disable_guc_interrupts(struct intel_guc *guc); > +void intel_guc_irq_handler(struct intel_guc *guc, u32 pm_iir); > > #endif > diff --git a/drivers/gpu/drm/i915/intel_guc_log.c b/drivers/gpu/drm/i915/intel_guc_log.c > index 8120208..f53c663 100644 > --- a/drivers/gpu/drm/i915/intel_guc_log.c > +++ b/drivers/gpu/drm/i915/intel_guc_log.c > @@ -503,14 +503,12 @@ static void guc_log_capture_logs(struct intel_guc *guc) > > static void guc_flush_logs(struct intel_guc *guc) > { > - struct drm_i915_private *dev_priv = guc_to_i915(guc); > - > if (!i915_modparams.enable_guc_submission || > (i915_modparams.guc_log_level < 0)) > return; > > /* First disable the interrupts, will be renabled afterwards */ > - intel_disable_guc_interrupts(dev_priv); > + intel_disable_guc_interrupts(guc); > > /* Before initiating the forceful flush, wait for any pending/ongoing > * flush to complete otherwise forceful flush may not actually happen. > @@ -628,7 +626,7 @@ int i915_guc_log_control(struct drm_i915_private *dev_priv, u64 control_val) > } > > /* GuC logging is currently the only user of Guc2Host interrupts */ > - intel_enable_guc_interrupts(dev_priv); > + intel_enable_guc_interrupts(guc); > } else { > /* Once logging is disabled, GuC won't generate logs & send an > * interrupt. But there could be some data in the log buffer > @@ -662,7 +660,7 @@ void i915_guc_log_unregister(struct drm_i915_private *dev_priv) > > mutex_lock(&dev_priv->drm.struct_mutex); > /* GuC logging is currently the only user of Guc2Host interrupts */ > - intel_disable_guc_interrupts(dev_priv); > + intel_disable_guc_interrupts(&dev_priv->guc); > guc_log_runtime_destroy(&dev_priv->guc); > mutex_unlock(&dev_priv->drm.struct_mutex); > } > diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c > index b9b9947a0..62738ad 100644 > --- a/drivers/gpu/drm/i915/intel_uc.c > +++ b/drivers/gpu/drm/i915/intel_uc.c > @@ -158,7 +158,7 @@ int intel_uc_init_hw(struct drm_i915_private *dev_priv) > return 0; > > guc_disable_communication(guc); > - intel_reset_guc_interrupts(dev_priv); > + intel_reset_guc_interrupts(guc); > > /* We need to notify the guc whenever we change the GGTT */ > i915_ggtt_enable_guc(dev_priv); > @@ -215,7 +215,7 @@ int intel_uc_init_hw(struct drm_i915_private *dev_priv) > intel_huc_auth(&dev_priv->huc); > if (i915_modparams.enable_guc_submission) { > if (i915_modparams.guc_log_level >= 0) > - intel_enable_guc_interrupts(dev_priv); > + intel_enable_guc_interrupts(guc); > > ret = i915_guc_submission_enable(dev_priv); > if (ret) > @@ -241,7 +241,7 @@ int intel_uc_init_hw(struct drm_i915_private *dev_priv) > */ > err_interrupts: > guc_disable_communication(guc); > - intel_disable_guc_interrupts(dev_priv); > + intel_disable_guc_interrupts(guc); > err_log_capture: > guc_capture_load_err_log(guc); > err_submission: > @@ -282,7 +282,7 @@ void intel_uc_fini_hw(struct drm_i915_private *dev_priv) > guc_disable_communication(&dev_priv->guc); > > if (i915_modparams.enable_guc_submission) { > - intel_disable_guc_interrupts(dev_priv); > + intel_disable_guc_interrupts(&dev_priv->guc); > i915_guc_submission_fini(dev_priv); > } > > Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Regards, Tvrtko
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 84a4bf3..1a5c026 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -1441,7 +1441,7 @@ static void gen8_gt_irq_handler(struct drm_i915_private *dev_priv, gen6_rps_irq_handler(dev_priv, gt_iir[2]); if (gt_iir[2] & dev_priv->pm_guc_events) - intel_guc_irq_handler(dev_priv, gt_iir[2]); + intel_guc_irq_handler(&dev_priv->guc, gt_iir[2]); } static bool bxt_port_hotplug_long_detect(enum port port, u32 val) diff --git a/drivers/gpu/drm/i915/intel_guc.c b/drivers/gpu/drm/i915/intel_guc.c index 3a64ae1..31f25e5 100644 --- a/drivers/gpu/drm/i915/intel_guc.c +++ b/drivers/gpu/drm/i915/intel_guc.c @@ -274,7 +274,7 @@ int intel_guc_suspend(struct drm_i915_private *dev_priv) if (guc->fw.load_status != INTEL_UC_FIRMWARE_SUCCESS) return 0; - intel_disable_guc_interrupts(dev_priv); + intel_disable_guc_interrupts(guc); ctx = dev_priv->kernel_context; @@ -302,7 +302,7 @@ int intel_guc_resume(struct drm_i915_private *dev_priv) return 0; if (i915_modparams.guc_log_level >= 0) - intel_enable_guc_interrupts(dev_priv); + intel_enable_guc_interrupts(guc); ctx = dev_priv->kernel_context; @@ -368,15 +368,19 @@ u32 intel_guc_wopcm_size(struct drm_i915_private *dev_priv) return wopcm_size; } -void intel_reset_guc_interrupts(struct drm_i915_private *dev_priv) +void intel_reset_guc_interrupts(struct intel_guc *guc) { + struct drm_i915_private *dev_priv = guc_to_i915(guc); + spin_lock_irq(&dev_priv->irq_lock); gen6_reset_pm_iir(dev_priv, dev_priv->pm_guc_events); spin_unlock_irq(&dev_priv->irq_lock); } -void intel_enable_guc_interrupts(struct drm_i915_private *dev_priv) +void intel_enable_guc_interrupts(struct intel_guc *guc) { + struct drm_i915_private *dev_priv = guc_to_i915(guc); + spin_lock_irq(&dev_priv->irq_lock); if (!dev_priv->guc.interrupts_enabled) { WARN_ON_ONCE(I915_READ(gen6_pm_iir(dev_priv)) & @@ -387,8 +391,10 @@ void intel_enable_guc_interrupts(struct drm_i915_private *dev_priv) spin_unlock_irq(&dev_priv->irq_lock); } -void intel_disable_guc_interrupts(struct drm_i915_private *dev_priv) +void intel_disable_guc_interrupts(struct intel_guc *guc) { + struct drm_i915_private *dev_priv = guc_to_i915(guc); + spin_lock_irq(&dev_priv->irq_lock); dev_priv->guc.interrupts_enabled = false; @@ -397,11 +403,13 @@ void intel_disable_guc_interrupts(struct drm_i915_private *dev_priv) spin_unlock_irq(&dev_priv->irq_lock); synchronize_irq(dev_priv->drm.irq); - intel_reset_guc_interrupts(dev_priv); + intel_reset_guc_interrupts(guc); } -void intel_guc_irq_handler(struct drm_i915_private *dev_priv, u32 gt_iir) +void intel_guc_irq_handler(struct intel_guc *guc, u32 gt_iir) { + struct drm_i915_private *dev_priv = guc_to_i915(guc); + if (gt_iir & GEN9_GUC_TO_HOST_INT_EVENT) { /* Sample the log buffer flush related bits & clear them out now * itself from the message identity register to minimize the diff --git a/drivers/gpu/drm/i915/intel_guc.h b/drivers/gpu/drm/i915/intel_guc.h index 8b26505..e89b4ae 100644 --- a/drivers/gpu/drm/i915/intel_guc.h +++ b/drivers/gpu/drm/i915/intel_guc.h @@ -116,9 +116,9 @@ static inline u32 guc_ggtt_offset(struct i915_vma *vma) int intel_guc_resume(struct drm_i915_private *dev_priv); struct i915_vma *intel_guc_allocate_vma(struct intel_guc *guc, u32 size); u32 intel_guc_wopcm_size(struct drm_i915_private *dev_priv); -void intel_reset_guc_interrupts(struct drm_i915_private *dev_priv); -void intel_enable_guc_interrupts(struct drm_i915_private *dev_priv); -void intel_disable_guc_interrupts(struct drm_i915_private *dev_priv); -void intel_guc_irq_handler(struct drm_i915_private *dev_priv, u32 pm_iir); +void intel_reset_guc_interrupts(struct intel_guc *guc); +void intel_enable_guc_interrupts(struct intel_guc *guc); +void intel_disable_guc_interrupts(struct intel_guc *guc); +void intel_guc_irq_handler(struct intel_guc *guc, u32 pm_iir); #endif diff --git a/drivers/gpu/drm/i915/intel_guc_log.c b/drivers/gpu/drm/i915/intel_guc_log.c index 8120208..f53c663 100644 --- a/drivers/gpu/drm/i915/intel_guc_log.c +++ b/drivers/gpu/drm/i915/intel_guc_log.c @@ -503,14 +503,12 @@ static void guc_log_capture_logs(struct intel_guc *guc) static void guc_flush_logs(struct intel_guc *guc) { - struct drm_i915_private *dev_priv = guc_to_i915(guc); - if (!i915_modparams.enable_guc_submission || (i915_modparams.guc_log_level < 0)) return; /* First disable the interrupts, will be renabled afterwards */ - intel_disable_guc_interrupts(dev_priv); + intel_disable_guc_interrupts(guc); /* Before initiating the forceful flush, wait for any pending/ongoing * flush to complete otherwise forceful flush may not actually happen. @@ -628,7 +626,7 @@ int i915_guc_log_control(struct drm_i915_private *dev_priv, u64 control_val) } /* GuC logging is currently the only user of Guc2Host interrupts */ - intel_enable_guc_interrupts(dev_priv); + intel_enable_guc_interrupts(guc); } else { /* Once logging is disabled, GuC won't generate logs & send an * interrupt. But there could be some data in the log buffer @@ -662,7 +660,7 @@ void i915_guc_log_unregister(struct drm_i915_private *dev_priv) mutex_lock(&dev_priv->drm.struct_mutex); /* GuC logging is currently the only user of Guc2Host interrupts */ - intel_disable_guc_interrupts(dev_priv); + intel_disable_guc_interrupts(&dev_priv->guc); guc_log_runtime_destroy(&dev_priv->guc); mutex_unlock(&dev_priv->drm.struct_mutex); } diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c index b9b9947a0..62738ad 100644 --- a/drivers/gpu/drm/i915/intel_uc.c +++ b/drivers/gpu/drm/i915/intel_uc.c @@ -158,7 +158,7 @@ int intel_uc_init_hw(struct drm_i915_private *dev_priv) return 0; guc_disable_communication(guc); - intel_reset_guc_interrupts(dev_priv); + intel_reset_guc_interrupts(guc); /* We need to notify the guc whenever we change the GGTT */ i915_ggtt_enable_guc(dev_priv); @@ -215,7 +215,7 @@ int intel_uc_init_hw(struct drm_i915_private *dev_priv) intel_huc_auth(&dev_priv->huc); if (i915_modparams.enable_guc_submission) { if (i915_modparams.guc_log_level >= 0) - intel_enable_guc_interrupts(dev_priv); + intel_enable_guc_interrupts(guc); ret = i915_guc_submission_enable(dev_priv); if (ret) @@ -241,7 +241,7 @@ int intel_uc_init_hw(struct drm_i915_private *dev_priv) */ err_interrupts: guc_disable_communication(guc); - intel_disable_guc_interrupts(dev_priv); + intel_disable_guc_interrupts(guc); err_log_capture: guc_capture_load_err_log(guc); err_submission: @@ -282,7 +282,7 @@ void intel_uc_fini_hw(struct drm_i915_private *dev_priv) guc_disable_communication(&dev_priv->guc); if (i915_modparams.enable_guc_submission) { - intel_disable_guc_interrupts(dev_priv); + intel_disable_guc_interrupts(&dev_priv->guc); i915_guc_submission_fini(dev_priv); }
GuC interrupts handling functions are GuC specific functions hence update the parameter from dev_priv to intel_guc struct. Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> --- drivers/gpu/drm/i915/i915_irq.c | 2 +- drivers/gpu/drm/i915/intel_guc.c | 22 +++++++++++++++------- drivers/gpu/drm/i915/intel_guc.h | 8 ++++---- drivers/gpu/drm/i915/intel_guc_log.c | 8 +++----- drivers/gpu/drm/i915/intel_uc.c | 8 ++++---- 5 files changed, 27 insertions(+), 21 deletions(-)