From patchwork Wed Oct 18 06:46:56 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: sagar.a.kamble@intel.com X-Patchwork-Id: 10013515 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 64CCC602C8 for ; Wed, 18 Oct 2017 06:44:04 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 577EB28AD1 for ; Wed, 18 Oct 2017 06:44:04 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 4B1FD28AD4; Wed, 18 Oct 2017 06:44:04 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id D660E28AD1 for ; Wed, 18 Oct 2017 06:44:03 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 4743F6E7F2; Wed, 18 Oct 2017 06:44:02 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTPS id CA5F26E7D6 for ; Wed, 18 Oct 2017 06:43:48 +0000 (UTC) Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 17 Oct 2017 23:43:48 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.43,394,1503385200"; d="scan'208";a="161751198" Received: from sakamble-desktop.iind.intel.com ([10.223.26.118]) by orsmga005.jf.intel.com with ESMTP; 17 Oct 2017 23:43:46 -0700 From: Sagar Arun Kamble To: intel-gfx@lists.freedesktop.org Date: Wed, 18 Oct 2017 12:16:56 +0530 Message-Id: <1508309222-26406-6-git-send-email-sagar.a.kamble@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1508309222-26406-1-git-send-email-sagar.a.kamble@intel.com> References: <1508309222-26406-1-git-send-email-sagar.a.kamble@intel.com> Subject: [Intel-gfx] [PATCH 05/11] drm/i915/guc: Make GuC log related functions depend only on log level X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP With guc_log_level parameter sanitized we can remove the GuC submission checks from flush_guc_logs and i915_guc_log_register/unregister and intel_uc_fini_hw. It is important to note that GuC log runtime/relay channel data has to be freed during driver unregister. Freeing of that data can't be gated by guc_log_level check because If we free GuC log runtime only when log level >=0 then it will not be destroyed when logging is disabled after enabling before driver unload and driver will try to destroy during cleanup/fini_hw where relay will be NULL already. With this patch GuC interrupts are enabled first after GuC load if logging is enabled. Earlier they were enabled only when submission was getting enabled. GuC to Host interrupts will be needed for GuC CT buffer recv mechanism and hence we will be adding support to control that interrupt based on ref. taken by Log or CT recv feature. To prepare for that all interrupt updates are now gated by GuC log level checks. v2: Rebase. Updated check in i915_guc_log_unregister to be based on guc_log_level. (Michal Wajdeczko) v3: Updated guc_log_unregister again. Made all GuC log related functions depend only guc_log_level. Updated uC init w.r.t enabling of GuC interrupts. Signed-off-by: Sagar Arun Kamble Cc: Michal Wajdeczko Cc: Daniele Ceraolo Spurio Cc: Tvrtko Ursulin Cc: Chris Wilson Cc: Joonas Lahtinen --- drivers/gpu/drm/i915/intel_guc.c | 3 ++- drivers/gpu/drm/i915/intel_guc_log.c | 12 ++++-------- drivers/gpu/drm/i915/intel_uc.c | 21 ++++++++++++--------- 3 files changed, 18 insertions(+), 18 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_guc.c b/drivers/gpu/drm/i915/intel_guc.c index 31f25e5..959057a 100644 --- a/drivers/gpu/drm/i915/intel_guc.c +++ b/drivers/gpu/drm/i915/intel_guc.c @@ -274,7 +274,8 @@ int intel_guc_suspend(struct drm_i915_private *dev_priv) if (guc->fw.load_status != INTEL_UC_FIRMWARE_SUCCESS) return 0; - intel_disable_guc_interrupts(guc); + if (i915_modparams.guc_log_level >= 0) + intel_disable_guc_interrupts(guc); ctx = dev_priv->kernel_context; diff --git a/drivers/gpu/drm/i915/intel_guc_log.c b/drivers/gpu/drm/i915/intel_guc_log.c index 200f0a1..f87e9f5 100644 --- a/drivers/gpu/drm/i915/intel_guc_log.c +++ b/drivers/gpu/drm/i915/intel_guc_log.c @@ -504,8 +504,7 @@ static void guc_log_capture_logs(struct intel_guc *guc) static void guc_flush_logs(struct intel_guc *guc) { - if (!i915_modparams.enable_guc_submission || - (i915_modparams.guc_log_level < 0)) + if (i915_modparams.guc_log_level < 0) return; /* First disable the interrupts, will be renabled afterwards */ @@ -645,8 +644,7 @@ int i915_guc_log_control(struct drm_i915_private *dev_priv, u64 control_val) void i915_guc_log_register(struct drm_i915_private *dev_priv) { - if (!i915_modparams.enable_guc_submission || - (i915_modparams.guc_log_level < 0)) + if (i915_modparams.guc_log_level < 0) return; mutex_lock(&dev_priv->drm.struct_mutex); @@ -656,12 +654,10 @@ void i915_guc_log_register(struct drm_i915_private *dev_priv) void i915_guc_log_unregister(struct drm_i915_private *dev_priv) { - if (!i915_modparams.enable_guc_submission) - return; - mutex_lock(&dev_priv->drm.struct_mutex); /* GuC logging is currently the only user of Guc2Host interrupts */ - intel_disable_guc_interrupts(&dev_priv->guc); + if (i915_modparams.guc_log_level >= 0) + intel_disable_guc_interrupts(&dev_priv->guc); guc_log_runtime_destroy(&dev_priv->guc); mutex_unlock(&dev_priv->drm.struct_mutex); } diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c index 8feefcd..95c5ec4 100644 --- a/drivers/gpu/drm/i915/intel_uc.c +++ b/drivers/gpu/drm/i915/intel_uc.c @@ -212,18 +212,18 @@ int intel_uc_init_hw(struct drm_i915_private *dev_priv) if (ret) goto err_log_capture; + if (i915_modparams.guc_log_level >= 0) + intel_enable_guc_interrupts(guc); + ret = guc_enable_communication(guc); if (ret) - goto err_log_capture; + goto err_interrupts; intel_huc_auth(&dev_priv->huc); if (i915_modparams.enable_guc_submission) { - if (i915_modparams.guc_log_level >= 0) - intel_enable_guc_interrupts(guc); - ret = i915_guc_submission_enable(dev_priv); if (ret) - goto err_interrupts; + goto err_comm; } dev_info(dev_priv->drm.dev, "GuC %s (firmware %s [version %u.%u])\n", @@ -243,9 +243,11 @@ int intel_uc_init_hw(struct drm_i915_private *dev_priv) * nonfatal error (i.e. it doesn't prevent driver load, but * marks the GPU as wedged until reset). */ -err_interrupts: +err_comm: guc_disable_communication(guc); - intel_disable_guc_interrupts(guc); +err_interrupts: + if (i915_modparams.guc_log_level >= 0) + intel_disable_guc_interrupts(guc); err_log_capture: guc_capture_load_err_log(guc); err_submission: @@ -285,10 +287,11 @@ void intel_uc_fini_hw(struct drm_i915_private *dev_priv) guc_disable_communication(&dev_priv->guc); - if (i915_modparams.enable_guc_submission) { + if (i915_modparams.guc_log_level >= 0) intel_disable_guc_interrupts(&dev_priv->guc); + + if (i915_modparams.enable_guc_submission) i915_guc_submission_fini(dev_priv); - } i915_ggtt_disable_guc(dev_priv); }