From patchwork Fri Nov 3 18:09:45 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: oscar.mateo@intel.com X-Patchwork-Id: 10040983 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id BBA7C602D8 for ; Fri, 3 Nov 2017 18:09:40 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id ACECA28F73 for ; Fri, 3 Nov 2017 18:09:40 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 9FB6A28F9E; Fri, 3 Nov 2017 18:09:40 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 3CE6128F73 for ; Fri, 3 Nov 2017 18:09:40 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id BA9536E11D; Fri, 3 Nov 2017 18:09:39 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by gabe.freedesktop.org (Postfix) with ESMTPS id 3F4FD6E11D for ; Fri, 3 Nov 2017 18:09:39 +0000 (UTC) Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 03 Nov 2017 11:09:38 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.44,339,1505804400"; d="scan'208";a="169033968" Received: from omateolo-linux.fm.intel.com ([10.1.27.13]) by orsmga005.jf.intel.com with ESMTP; 03 Nov 2017 11:09:38 -0700 From: Oscar Mateo To: intel-gfx@lists.freedesktop.org Date: Fri, 3 Nov 2017 11:09:45 -0700 Message-Id: <1509732588-10599-18-git-send-email-oscar.mateo@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1509732588-10599-1-git-send-email-oscar.mateo@intel.com> References: <1509732588-10599-1-git-send-email-oscar.mateo@intel.com> MIME-Version: 1.0 Cc: Rodrigo Vivi Subject: [Intel-gfx] [RFC PATCH 17/20] drm/i915/skl: Move GT and Display workarounds from init_clock_gating X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP To their rightful place inside intel_workarounds.c v2: Static tables (Joonas) Signed-off-by: Oscar Mateo Reviewed-by: Chris Wilson (v1) Cc: Rodrigo Vivi Cc: Mika Kuoppala Cc: Ville Syrjälä --- drivers/gpu/drm/i915/intel_pm.c | 15 +-------------- drivers/gpu/drm/i915/intel_workarounds.c | 8 ++++++++ 2 files changed, 9 insertions(+), 14 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 98e976e..eb5bac0 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -8417,17 +8417,6 @@ static void gen8_set_l3sqc_credits(struct drm_i915_private *dev_priv, I915_WRITE(GEN7_MISCCPCTL, misccpctl); } -static void skl_init_clock_gating(struct drm_i915_private *dev_priv) -{ - /* WAC6entrylatency:skl */ - I915_WRITE(FBC_LLC_READ_CTRL, I915_READ(FBC_LLC_READ_CTRL) | - FBC_LLC_FULLY_OPEN); - - /* WaFbcNukeOnHostModify:skl */ - I915_WRITE(ILK_DPFC_CHICKEN, I915_READ(ILK_DPFC_CHICKEN) | - ILK_DPFC_NUKE_ON_ANY_MODIFICATION); -} - static void bdw_init_clock_gating(struct drm_i915_private *dev_priv) { /* The GTT cache must be disabled if the system is using 2M pages. */ @@ -8878,10 +8867,8 @@ void intel_init_clock_gating_hooks(struct drm_i915_private *dev_priv) { if (IS_CANNONLAKE(dev_priv) || IS_COFFEELAKE(dev_priv) || IS_GEMINILAKE(dev_priv) || IS_KABYLAKE(dev_priv) || - IS_BROXTON(dev_priv)) + IS_BROXTON(dev_priv) || IS_SKYLAKE(dev_priv)) dev_priv->display.init_clock_gating = nop_init_clock_gating; - else if (IS_SKYLAKE(dev_priv)) - dev_priv->display.init_clock_gating = skl_init_clock_gating; else if (IS_BROADWELL(dev_priv)) dev_priv->display.init_clock_gating = bdw_init_clock_gating; else if (IS_CHERRYVIEW(dev_priv)) diff --git a/drivers/gpu/drm/i915/intel_workarounds.c b/drivers/gpu/drm/i915/intel_workarounds.c index 1ebe56d..0e3f7c3 100644 --- a/drivers/gpu/drm/i915/intel_workarounds.c +++ b/drivers/gpu/drm/i915/intel_workarounds.c @@ -932,6 +932,14 @@ void intel_gt_workarounds_apply(struct drm_i915_private *dev_priv) { WA_DISP("WaDisableDopClockGating"), ALL_REVS, REG(GEN7_MISCCPCTL), CLEAR_BIT(GEN7_DOP_CLOCK_GATE_ENABLE) }, + + { WA_DISP("WAC6entrylatency"), + ALL_REVS, REG(FBC_LLC_READ_CTRL), + SET_BIT(FBC_LLC_FULLY_OPEN) }, + + { WA_DISP("WaFbcNukeOnHostModify"), + ALL_REVS, REG(ILK_DPFC_CHICKEN), + SET_BIT(ILK_DPFC_NUKE_ON_ANY_MODIFICATION) }, }; static struct i915_wa_reg bxt_disp_was[] = {