From patchwork Thu Nov 9 09:33:59 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Zhang, Tina" X-Patchwork-Id: 10050635 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id CCFE960381 for ; Thu, 9 Nov 2017 09:39:42 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id BE5272AB2B for ; Thu, 9 Nov 2017 09:39:42 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id B1FB82AB5A; Thu, 9 Nov 2017 09:39:42 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 664C42AB2B for ; Thu, 9 Nov 2017 09:39:42 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C7A2A6E8B3; Thu, 9 Nov 2017 09:39:41 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by gabe.freedesktop.org (Postfix) with ESMTPS id 376C96E8B3; Thu, 9 Nov 2017 09:39:41 +0000 (UTC) Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga105.fm.intel.com with ESMTP; 09 Nov 2017 01:39:41 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.44,369,1505804400"; d="scan'208";a="620613" Received: from tinazhang-linux-1.bj.intel.com ([10.238.158.80]) by fmsmga001.fm.intel.com with ESMTP; 09 Nov 2017 01:39:37 -0800 From: Tina Zhang To: alex.williamson@redhat.com, kraxel@redhat.com, chris@chris-wilson.co.uk, joonas.lahtinen@linux.intel.com, zhenyuw@linux.intel.com, zhiyuan.lv@intel.com, zhi.a.wang@intel.com, kevin.tian@intel.com, daniel@ffwll.ch, kwankhede@nvidia.com, hang.yuan@intel.com Date: Thu, 9 Nov 2017 17:33:59 +0800 Message-Id: <1510220042-4931-4-git-send-email-tina.zhang@intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1510220042-4931-1-git-send-email-tina.zhang@intel.com> References: <1510220042-4931-1-git-send-email-tina.zhang@intel.com> Cc: intel-gfx@lists.freedesktop.org, intel-gvt-dev@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: [Intel-gfx] [PATCH v17 3/6] drm/i915/gvt: Add RGB 64-bit 16:16:16:16 float format X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP The RGB 64-bit 16:16:16:16 float pixel format is needed by windows 10 guest VM. This patch is to add this pixel format support to gvt device model. Without this patch, some Apps, e.g. "DXGIGammaVM.exe", will crash and make guest screen black. Signed-off-by: Tina Zhang --- drivers/gpu/drm/i915/gvt/fb_decoder.c | 28 +++++++++++++++++++++------- 1 file changed, 21 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915/gvt/fb_decoder.c b/drivers/gpu/drm/i915/gvt/fb_decoder.c index 6c99c64..b9e0d8e 100644 --- a/drivers/gpu/drm/i915/gvt/fb_decoder.c +++ b/drivers/gpu/drm/i915/gvt/fb_decoder.c @@ -52,6 +52,8 @@ static struct pixel_format bdw_pixel_formats[] = { {DRM_FORMAT_XRGB2101010, 32, "32-bit BGRX (2:10:10:10 MSB-X:R:G:B)"}, {DRM_FORMAT_XBGR8888, 32, "32-bit RGBX (8:8:8:8 MSB-X:B:G:R)"}, + {DRM_FORMAT_XRGB161616F, 64, + "64-bit XRGB Floating Point (16:16:16:16 MSB-X:R:G:B)"}, /* non-supported format has bpp default to 0 */ {0, 0, NULL}, @@ -73,13 +75,18 @@ static struct pixel_format skl_pixel_formats[] = { {DRM_FORMAT_XBGR2101010, 32, "32-bit RGBX (2:10:10:10 MSB-X:B:G:R)"}, {DRM_FORMAT_XRGB2101010, 32, "32-bit BGRX (2:10:10:10 MSB-X:R:G:B)"}, + {DRM_FORMAT_XRGB161616F, 64, + "64-bit XRGB Floating Point (16:16:16:16 MSB-X:R:G:B)"}, + {DRM_FORMAT_XBGR161616F, 64, + "64-bit XBGR Floating Point (16:16:16:16 MSB-X:B:G:R)"}, + /* non-supported format has bpp default to 0 */ {0, 0, NULL}, }; static int bdw_format_to_drm(int format) { - int bdw_pixel_formats_index = 6; + int bdw_pixel_formats_index = 7; switch (format) { case DISPPLANE_8BPP: @@ -100,7 +107,9 @@ static int bdw_format_to_drm(int format) case DISPPLANE_RGBX888: bdw_pixel_formats_index = 5; break; - + case DISPPLANE_RGBX161616: + bdw_pixel_formats_index = 6; + break; default: break; } @@ -111,7 +120,7 @@ static int bdw_format_to_drm(int format) static int skl_format_to_drm(int format, bool rgb_order, bool alpha, int yuv_order) { - int skl_pixel_formats_index = 12; + int skl_pixel_formats_index = 14; switch (format) { case PLANE_CTL_FORMAT_INDEXED: @@ -129,6 +138,9 @@ static int skl_format_to_drm(int format, bool rgb_order, bool alpha, case PLANE_CTL_FORMAT_XRGB_2101010: skl_pixel_formats_index = rgb_order ? 10 : 11; break; + case PLANE_CTL_FORMAT_XRGB_16161616F: + skl_pixel_formats_index = rgb_order ? 12 : 13; + break; case PLANE_CTL_FORMAT_YUV422: skl_pixel_formats_index = yuv_order >> 16; if (skl_pixel_formats_index > 3) @@ -389,11 +401,13 @@ int intel_vgpu_decode_cursor_plane(struct intel_vgpu *vgpu, #define SPRITE_FORMAT_NUM (1 << 3) static struct pixel_format sprite_pixel_formats[SPRITE_FORMAT_NUM] = { - [0x0] = {DRM_FORMAT_YUV422, 16, "YUV 16-bit 4:2:2 packed"}, - [0x1] = {DRM_FORMAT_XRGB2101010, 32, "RGB 32-bit 2:10:10:10"}, - [0x2] = {DRM_FORMAT_XRGB8888, 32, "RGB 32-bit 8:8:8:8"}, + [0x0] = {DRM_FORMAT_YUV422, 16, "16-bit YUV 4:2:2 packed"}, + [0x1] = {DRM_FORMAT_XRGB2101010, 32, "32-bit BGRX (2:10:10:10 MSB-X:R:G:B)"}, + [0x2] = {DRM_FORMAT_XRGB8888, 32, "32-bit RGBX (8:8:8:8 MSB-X:B:G:R)"}, + [0x3] = {DRM_FORMAT_XRGB161616F, 64, + "64-bit XRGB Floating Point (16:16:16:16 MSB-X:R:G:B)"}, [0x4] = {DRM_FORMAT_AYUV, 32, - "YUV 32-bit 4:4:4 packed (8:8:8:8 MSB-X:Y:U:V)"}, + "32-bit YUV 4:4:4 packed (8:8:8:8 MSB-X:Y:U:V)"}, }; /**