Message ID | 1511972351-574-3-git-send-email-sagar.a.kamble@intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
>-----Original Message----- >From: Kamble, Sagar A >Sent: Wednesday, November 29, 2017 8:19 AM >To: intel-gfx@lists.freedesktop.org >Cc: Kamble, Sagar A <sagar.a.kamble@intel.com>; Mcgee, Jeff ><jeff.mcgee@intel.com>; Spotswood, John A <john.a.spotswood@intel.com>; >Srivatsa, Anusha <anusha.srivatsa@intel.com>; Wajdeczko, Michal ><Michal.Wajdeczko@intel.com>; Vivi, Rodrigo <rodrigo.vivi@intel.com>; Joonas >Lahtinen <joonas.lahtinen@linux.intel.com> >Subject: [PATCH v2 2/3] drm/i915/guc: Change default GuC FW for BXT to v9.29 > >This patch makes v9.29 firmware as default firmware for BXT. > >Note: GuC logging control is changed with this firmware. GuC is expecting i915 to >set control bit to enable "default logging" >while using GuC action UK_LOG_ENABLE_LOGGING. >However i915 is currently not doing this because it is version specific change and >can be handled entirely in GuC. It will need to be fixed in future firmwares. > >This update includes (since v8.7): > >- Added support to log media reset count for host to read it >- BXT WA for fixing MTP hangs. WaDisableDOPRenderClkGatingAtSubmit >- Sub-feature level control for power management features. >- Minor clean-up for power management interface. >- Unified power management interface and scheduler interface into > 1 file using same version. >- Bug Fix for multi context scheduler flag. >- DCC spec changes for BXT + DCT enabling >- Springboard based Pre-ETM/ETM flow enabling for debug signed GuC/HuC >- Moving GuC non_critical r/w data to lower SRAM 64KB >- Enabled IBC for BXT >- Media engine Reset fix. Correctly marking context for resubmission in > Media Reset case. >- SLPC Dynamic RPe fix to resolve issues where incorrect frequency was set. >- ABT Disable bug fix. Disabled Evaluation mode on context change. >- GuC clean up to align developer build in line to production build. >- Disable ARAT interrupt before programming ARAT delta. >- Memory range check in Parse to avoid failure due to overflow. >- Clear forcewake in CSB when SQ is empty. >- SLPC IBC 1.6 for APL to ensure multiplier does not cap IA below Pe. >- Move UkGuckmdInterface.h file from 2016 folders to common 2016 folder. >- This is file location change. No functional change done as part of this > check in. >- 3 tries of wake request needed from GuC2CSME for ME to wake up. Request > has come from ME spec >- During reset one parameter was not getting accounted >- Enabling Guc Log changes for ultra low logging for OCA >- Disable build.bat redundant prints. >- Move few least used functions to non-critical section. >- Rearrange GuC documentation folder structure. >- Fixing Issue with Default Guc Log changes for OCA using special Control > Bit > >v2: Rebase. Updated commit message. > >Signed-off-by: Jeff McGee <jeff.mcgee@intel.com> >Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com> >Cc: Spotswood John A <john.a.spotswood@intel.com> >Cc: Anusha Srivatsa <anusha.srivatsa@intel.com> >Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> >Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> >Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com> > drivers/gpu/drm/i915/intel_guc_fw.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > >diff --git a/drivers/gpu/drm/i915/intel_guc_fw.c >b/drivers/gpu/drm/i915/intel_guc_fw.c >index 631e932..df2ff96 100644 >--- a/drivers/gpu/drm/i915/intel_guc_fw.c >+++ b/drivers/gpu/drm/i915/intel_guc_fw.c >@@ -33,8 +33,8 @@ > #define SKL_FW_MAJOR 9 > #define SKL_FW_MINOR 33 > >-#define BXT_FW_MAJOR 8 >-#define BXT_FW_MINOR 7 >+#define BXT_FW_MAJOR 9 >+#define BXT_FW_MINOR 29 > > #define KBL_FW_MAJOR 9 > #define KBL_FW_MINOR 14 >-- >1.9.1
diff --git a/drivers/gpu/drm/i915/intel_guc_fw.c b/drivers/gpu/drm/i915/intel_guc_fw.c index 631e932..df2ff96 100644 --- a/drivers/gpu/drm/i915/intel_guc_fw.c +++ b/drivers/gpu/drm/i915/intel_guc_fw.c @@ -33,8 +33,8 @@ #define SKL_FW_MAJOR 9 #define SKL_FW_MINOR 33 -#define BXT_FW_MAJOR 8 -#define BXT_FW_MINOR 7 +#define BXT_FW_MAJOR 9 +#define BXT_FW_MINOR 29 #define KBL_FW_MAJOR 9 #define KBL_FW_MINOR 14