From patchwork Thu Jan 4 16:21:53 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: sagar.a.kamble@intel.com X-Patchwork-Id: 10145121 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 3D326601A1 for ; Thu, 4 Jan 2018 16:19:05 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 28DAB286EF for ; Thu, 4 Jan 2018 16:19:05 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 1DC81286EB; Thu, 4 Jan 2018 16:19:05 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id B4891286EB for ; Thu, 4 Jan 2018 16:19:04 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 6B9B76E19A; Thu, 4 Jan 2018 16:19:03 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by gabe.freedesktop.org (Postfix) with ESMTPS id 5F1DA6E1AC for ; Thu, 4 Jan 2018 16:19:01 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 04 Jan 2018 08:18:50 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.45,507,1508828400"; d="scan'208";a="24309230" Received: from sakamble-desktop.iind.intel.com ([10.223.26.10]) by orsmga002.jf.intel.com with ESMTP; 04 Jan 2018 08:18:48 -0800 From: Sagar Arun Kamble To: intel-gfx@lists.freedesktop.org Date: Thu, 4 Jan 2018 21:51:53 +0530 Message-Id: <1515082914-4111-12-git-send-email-sagar.a.kamble@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1515082914-4111-1-git-send-email-sagar.a.kamble@intel.com> References: <1515082914-4111-1-git-send-email-sagar.a.kamble@intel.com> Subject: [Intel-gfx] [PATCH v3 11/12] drm/i915/guc: Restore GuC interrupts across suspend/reset if enabled X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP In order to override the disable/enable control of GuC interrupts during suspend/reset cycle we are creating two new functions suspend/restore guc_interrupts which check if interrupts were enabled and disable them on suspend and enable them on resume. They are used to restore interrupts across reset as well. Further restructuring of runtime_pm_enable/disable_interrupts and suspend/restore_guc_interrupts will be done in upcoming patches. v2: Rebase. v3: Updated suspend/restore with the new low level get/put functions. (Tvrtko) Signed-off-by: Sagar Arun Kamble Cc: Michal Wajdeczko Cc: Daniele Ceraolo Spurio Cc: Tvrtko Ursulin Cc: Chris Wilson Cc: Joonas Lahtinen --- drivers/gpu/drm/i915/intel_display.c | 2 ++ drivers/gpu/drm/i915/intel_guc.c | 32 ++++++++++++++++++++++++++++---- drivers/gpu/drm/i915/intel_guc.h | 2 ++ 3 files changed, 32 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 0cd3559..2e0db53 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -3676,8 +3676,10 @@ void intel_finish_reset(struct drm_i915_private *dev_priv) * The display has been reset as well, * so need a full re-initialization. */ + intel_suspend_guc_interrupts(&dev_priv->guc); intel_runtime_pm_disable_interrupts(dev_priv); intel_runtime_pm_enable_interrupts(dev_priv); + intel_restore_guc_interrupts(&dev_priv->guc); intel_pps_unlock_regs_wa(dev_priv); intel_modeset_init_hw(dev); diff --git a/drivers/gpu/drm/i915/intel_guc.c b/drivers/gpu/drm/i915/intel_guc.c index d356c40..28a418a 100644 --- a/drivers/gpu/drm/i915/intel_guc.c +++ b/drivers/gpu/drm/i915/intel_guc.c @@ -406,8 +406,7 @@ int intel_guc_suspend(struct drm_i915_private *dev_priv) if (guc->fw.load_status != INTEL_UC_FIRMWARE_SUCCESS) return 0; - if (guc->log.level >= 0) - intel_put_guc_interrupts(guc, GUC_INTR_CLIENT_LOG); + intel_suspend_guc_interrupts(guc); data[0] = INTEL_GUC_ACTION_ENTER_S_STATE; /* any value greater than GUC_POWER_D0 */ @@ -452,8 +451,7 @@ int intel_guc_resume(struct drm_i915_private *dev_priv) if (guc->fw.load_status != INTEL_UC_FIRMWARE_SUCCESS) return 0; - if (guc->log.level >= 0) - intel_get_guc_interrupts(guc, GUC_INTR_CLIENT_LOG); + intel_restore_guc_interrupts(guc); data[0] = INTEL_GUC_ACTION_EXIT_S_STATE; data[1] = GUC_POWER_D0; @@ -548,6 +546,16 @@ void intel_get_guc_interrupts(struct intel_guc *guc, enum guc_intr_client id) spin_unlock_irq(&dev_priv->irq_lock); } +void intel_restore_guc_interrupts(struct intel_guc *guc) +{ + struct drm_i915_private *dev_priv = guc_to_i915(guc); + + spin_lock_irq(&dev_priv->irq_lock); + if (guc->interrupt_clients) + __intel_get_guc_interrupts(guc); + spin_unlock_irq(&dev_priv->irq_lock); +} + static void __intel_put_guc_interrupts(struct intel_guc *guc) { struct drm_i915_private *dev_priv = guc_to_i915(guc); @@ -576,6 +584,22 @@ void intel_put_guc_interrupts(struct intel_guc *guc, enum guc_intr_client id) intel_reset_guc_interrupts(guc); } +void intel_suspend_guc_interrupts(struct intel_guc *guc) +{ + struct drm_i915_private *dev_priv = guc_to_i915(guc); + + spin_lock_irq(&dev_priv->irq_lock); + if (!guc->interrupt_clients) { + spin_unlock_irq(&dev_priv->irq_lock); + return; + } + __intel_put_guc_interrupts(guc); + spin_unlock_irq(&dev_priv->irq_lock); + synchronize_irq(dev_priv->drm.irq); + + intel_reset_guc_interrupts(guc); +} + void intel_guc_irq_handler(struct intel_guc *guc, u32 gt_iir) { struct drm_i915_private *dev_priv = guc_to_i915(guc); diff --git a/drivers/gpu/drm/i915/intel_guc.h b/drivers/gpu/drm/i915/intel_guc.h index af74392..2c14781 100644 --- a/drivers/gpu/drm/i915/intel_guc.h +++ b/drivers/gpu/drm/i915/intel_guc.h @@ -140,5 +140,7 @@ static inline u32 guc_ggtt_offset(struct i915_vma *vma) void intel_get_guc_interrupts(struct intel_guc *guc, enum guc_intr_client id); void intel_put_guc_interrupts(struct intel_guc *guc, enum guc_intr_client id); void intel_guc_irq_handler(struct intel_guc *guc, u32 pm_iir); +void intel_suspend_guc_interrupts(struct intel_guc *guc); +void intel_restore_guc_interrupts(struct intel_guc *guc); #endif