From patchwork Fri Jan 5 08:47:00 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: sagar.a.kamble@intel.com X-Patchwork-Id: 10146095 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 15C5F60244 for ; Fri, 5 Jan 2018 08:43:49 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0DC23288A1 for ; Fri, 5 Jan 2018 08:43:49 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 01779288A7; Fri, 5 Jan 2018 08:43:48 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id A0F26288A1 for ; Fri, 5 Jan 2018 08:43:48 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 50C806E2FB; Fri, 5 Jan 2018 08:43:48 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by gabe.freedesktop.org (Postfix) with ESMTPS id A01F56E2FC for ; Fri, 5 Jan 2018 08:43:46 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 05 Jan 2018 00:43:46 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.46,317,1511856000"; d="scan'208";a="192452346" Received: from sakamble-desktop.iind.intel.com ([10.223.26.10]) by fmsmga005.fm.intel.com with ESMTP; 05 Jan 2018 00:43:44 -0800 From: Sagar Arun Kamble To: intel-gfx@lists.freedesktop.org Date: Fri, 5 Jan 2018 14:17:00 +0530 Message-Id: <1515142021-24232-9-git-send-email-sagar.a.kamble@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1515142021-24232-1-git-send-email-sagar.a.kamble@intel.com> References: <1515142021-24232-1-git-send-email-sagar.a.kamble@intel.com> Subject: [Intel-gfx] [PATCH v4 8/9] drm/i915/guc: Restore GuC interrupts across suspend/reset if enabled X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP In order to override the disable/enable control of GuC interrupts during suspend/reset cycle we are creating two new functions suspend/restore guc_interrupts which check if interrupts were enabled and disable them on suspend and enable them on resume. They are used to restore interrupts across reset as well. Further restructuring of runtime_pm_enable/disable_interrupts and suspend/restore_guc_interrupts will be done in upcoming patches. v2: Rebase. v3: Updated suspend/restore with the new low level get/put functions. (Tvrtko) v4: Rebase. s/intel_*_guc_interrupts/intel_guc_*_interrupts (Michal) Signed-off-by: Sagar Arun Kamble Cc: Michal Wajdeczko Cc: Daniele Ceraolo Spurio Cc: Tvrtko Ursulin Cc: Chris Wilson Cc: Joonas Lahtinen --- drivers/gpu/drm/i915/intel_display.c | 2 ++ drivers/gpu/drm/i915/intel_guc.c | 30 ++++++++++++++++++++++++++++-- drivers/gpu/drm/i915/intel_guc.h | 2 ++ 3 files changed, 32 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 0cd3559..fe5e71a 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -3676,8 +3676,10 @@ void intel_finish_reset(struct drm_i915_private *dev_priv) * The display has been reset as well, * so need a full re-initialization. */ + intel_guc_suspend_interrupts(&dev_priv->guc); intel_runtime_pm_disable_interrupts(dev_priv); intel_runtime_pm_enable_interrupts(dev_priv); + intel_guc_restore_interrupts(&dev_priv->guc); intel_pps_unlock_regs_wa(dev_priv); intel_modeset_init_hw(dev); diff --git a/drivers/gpu/drm/i915/intel_guc.c b/drivers/gpu/drm/i915/intel_guc.c index 7d66ee5..0a33eda 100644 --- a/drivers/gpu/drm/i915/intel_guc.c +++ b/drivers/gpu/drm/i915/intel_guc.c @@ -406,7 +406,7 @@ int intel_guc_suspend(struct drm_i915_private *dev_priv) if (guc->fw.load_status != INTEL_UC_FIRMWARE_SUCCESS) return 0; - intel_guc_log_disable_interrupts(guc); + intel_guc_suspend_interrupts(guc); data[0] = INTEL_GUC_ACTION_ENTER_S_STATE; /* any value greater than GUC_POWER_D0 */ @@ -451,7 +451,7 @@ int intel_guc_resume(struct drm_i915_private *dev_priv) if (guc->fw.load_status != INTEL_UC_FIRMWARE_SUCCESS) return 0; - intel_guc_log_enable_interrupts(guc); + intel_guc_restore_interrupts(guc); data[0] = INTEL_GUC_ACTION_EXIT_S_STATE; data[1] = GUC_POWER_D0; @@ -547,6 +547,16 @@ void intel_guc_enable_interrupts(struct intel_guc *guc, spin_unlock_irq(&dev_priv->irq_lock); } +void intel_guc_restore_interrupts(struct intel_guc *guc) +{ + struct drm_i915_private *dev_priv = guc_to_i915(guc); + + spin_lock_irq(&dev_priv->irq_lock); + if (guc->interrupt_clients) + __intel_guc_enable_interrupts(guc); + spin_unlock_irq(&dev_priv->irq_lock); +} + static void __intel_guc_disable_interrupts(struct intel_guc *guc) { struct drm_i915_private *dev_priv = guc_to_i915(guc); @@ -576,6 +586,22 @@ void intel_guc_disable_interrupts(struct intel_guc *guc, intel_guc_reset_interrupts(guc); } +void intel_guc_suspend_interrupts(struct intel_guc *guc) +{ + struct drm_i915_private *dev_priv = guc_to_i915(guc); + + spin_lock_irq(&dev_priv->irq_lock); + if (!guc->interrupt_clients) { + spin_unlock_irq(&dev_priv->irq_lock); + return; + } + __intel_guc_disable_interrupts(guc); + spin_unlock_irq(&dev_priv->irq_lock); + synchronize_irq(dev_priv->drm.irq); + + intel_guc_reset_interrupts(guc); +} + void intel_guc_irq_handler(struct intel_guc *guc, u32 gt_iir) { struct drm_i915_private *dev_priv = guc_to_i915(guc); diff --git a/drivers/gpu/drm/i915/intel_guc.h b/drivers/gpu/drm/i915/intel_guc.h index f248565..ef7d2fd 100644 --- a/drivers/gpu/drm/i915/intel_guc.h +++ b/drivers/gpu/drm/i915/intel_guc.h @@ -142,5 +142,7 @@ void intel_guc_enable_interrupts(struct intel_guc *guc, void intel_guc_disable_interrupts(struct intel_guc *guc, enum intel_guc_intr_client id); void intel_guc_irq_handler(struct intel_guc *guc, u32 pm_iir); +void intel_guc_suspend_interrupts(struct intel_guc *guc); +void intel_guc_restore_interrupts(struct intel_guc *guc); #endif