From patchwork Fri Mar 30 08:31:53 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: sagar.a.kamble@intel.com X-Patchwork-Id: 10317387 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id B410660467 for ; Fri, 30 Mar 2018 08:28:59 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A65B62A565 for ; Fri, 30 Mar 2018 08:28:59 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 9B3462A567; Fri, 30 Mar 2018 08:28:59 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 073E82A565 for ; Fri, 30 Mar 2018 08:28:59 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 697206E86F; Fri, 30 Mar 2018 08:28:56 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by gabe.freedesktop.org (Postfix) with ESMTPS id EEB896E85A for ; Fri, 30 Mar 2018 08:28:46 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 30 Mar 2018 01:28:46 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.48,380,1517904000"; d="scan'208";a="38104602" Received: from sakamble-desktop.iind.intel.com ([10.223.26.10]) by FMSMGA003.fm.intel.com with ESMTP; 30 Mar 2018 01:28:44 -0700 From: Sagar Arun Kamble To: intel-gfx@lists.freedesktop.org Date: Fri, 30 Mar 2018 14:01:53 +0530 Message-Id: <1522398722-12161-9-git-send-email-sagar.a.kamble@intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1522398722-12161-1-git-send-email-sagar.a.kamble@intel.com> References: <1522398722-12161-1-git-send-email-sagar.a.kamble@intel.com> Subject: [Intel-gfx] [PATCH v12 08/17] drm/i915/guc/slpc: Send SHUTDOWN event to stop SLPC tasks X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sujaritha Sundaresan , Tom O'Rourke MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP From: Tom O'Rourke Send SLPC shutdown event during uc_fini_hw or prior to enabling SLPC done while communicating updated parameters in shared data. v1: Return void instead of ignored error code (Paulo). Removed WARN_ON for checking msb of gtt address of shared gem obj. (Chris) Added SLPC state update during disable, suspend and reset. Changed semantics of reset. It is supposed to just disable. (Sagar) v2-v4: Rebase. v5: Updated the input data structure. (Sagar) v6: Rebase. v7: s/i915_ggtt_offset/guc_ggtt_offset. v8: Updated the status check post disabling to wait for 20us. (Sagar) v9: Updated the status check wait time to 5ms for safe margin as it is handled similar to reset by SLPC. s/slpc_disabled/slpc_stopped v10: Rebase. Signed-off-by: Tom O'Rourke Signed-off-by: Sagar Arun Kamble Cc: Chris Wilson Cc: Joonas Lahtinen Cc: Radoslaw Szwichtenberg Cc: Michal Wajdeczko Cc: Sujaritha Sundaresan Cc: Jeff McGee --- drivers/gpu/drm/i915/intel_guc_slpc.c | 38 +++++++++++++++++++++++++++++++++++ drivers/gpu/drm/i915/intel_uc.c | 6 +++--- 2 files changed, 41 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_guc_slpc.c b/drivers/gpu/drm/i915/intel_guc_slpc.c index bc2c717..7f75d218 100644 --- a/drivers/gpu/drm/i915/intel_guc_slpc.c +++ b/drivers/gpu/drm/i915/intel_guc_slpc.c @@ -368,6 +368,28 @@ static bool slpc_running(struct intel_guc_slpc *slpc) return (data.global_state == SLPC_GLOBAL_STATE_RUNNING); } +static void host2guc_slpc_shutdown(struct intel_guc_slpc *slpc) +{ + struct intel_guc *guc = slpc_to_guc(slpc); + u32 shared_data_gtt_offset = intel_guc_ggtt_offset(guc, slpc->vma); + struct slpc_event_input data = {0}; + + data.header.value = SLPC_EVENT(SLPC_EVENT_SHUTDOWN, 2); + data.args[0] = shared_data_gtt_offset; + data.args[1] = 0; + + slpc_send(slpc, &data, 4); +} + +static bool slpc_stopped(struct intel_guc_slpc *slpc) +{ + struct slpc_shared_data data; + + slpc_read_shared_data(slpc, &data); + + return (data.global_state == SLPC_GLOBAL_STATE_NOT_RUNNING); +} + /** * intel_guc_slpc_init() - Initialize the SLPC shared data structure. * @slpc: pointer to intel_guc_slpc. @@ -448,8 +470,24 @@ int intel_guc_slpc_enable(struct intel_guc_slpc *slpc) return 0; } +/** + * intel_guc_slpc_disable() - Stop SLPC tasks. + * @slpc: pointer to intel_guc_slpc. + * + * This function will stop GuC SLPC tasks by sending Host to GuC action. + */ void intel_guc_slpc_disable(struct intel_guc_slpc *slpc) { + mutex_lock(&slpc->lock); + + host2guc_slpc_shutdown(slpc); + + /* Ensure SLPC is not running */ + if (wait_for(slpc_stopped(slpc), 5)) + DRM_ERROR("SLPC not disabled! State = %s\n", + slpc_get_state(slpc)); + + mutex_unlock(&slpc->lock); } /** diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c index 5bf33c8..ece6687 100644 --- a/drivers/gpu/drm/i915/intel_uc.c +++ b/drivers/gpu/drm/i915/intel_uc.c @@ -359,6 +359,9 @@ void intel_uc_sanitize(struct drm_i915_private *i915) GEM_BUG_ON(!HAS_GUC(i915)); + if (USES_GUC_SLPC(dev_priv)) + intel_guc_slpc_disable(&guc->slpc); + guc_disable_communication(guc); intel_huc_sanitize(huc); @@ -484,9 +487,6 @@ void intel_uc_fini_hw(struct drm_i915_private *dev_priv) if (USES_GUC_SUBMISSION(dev_priv)) intel_guc_submission_disable(guc); - if (USES_GUC_SLPC(dev_priv)) - intel_guc_slpc_disable(&guc->slpc); - guc_disable_communication(guc); }