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[1/3] drm/i915/icl: Use the same pll functions for dsi

Message ID 1540292954-19413-2-git-send-email-vandita.kulkarni@intel.com (mailing list archive)
State New, archived
Headers show
Series ICL DSI PLL enable | expand

Commit Message

Kulkarni, Vandita Oct. 23, 2018, 11:09 a.m. UTC 
The same pll manager functions can be used to enable
dpll for mipi. Hence enabling the IO power and
esc clock as part of pre pll enable call.

Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
---
 drivers/gpu/drm/i915/icl_dsi.c | 17 +++++++++++++----
 1 file changed, 13 insertions(+), 4 deletions(-)
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/icl_dsi.c b/drivers/gpu/drm/i915/icl_dsi.c
index 216a175..d2bb369 100644
--- a/drivers/gpu/drm/i915/icl_dsi.c
+++ b/drivers/gpu/drm/i915/icl_dsi.c
@@ -637,16 +637,25 @@  static void gen11_dsi_enable_transcoder(struct intel_encoder *encoder)
 }
 
 static void __attribute__((unused))
-gen11_dsi_pre_enable(struct intel_encoder *encoder,
-		     const struct intel_crtc_state *pipe_config,
-		     const struct drm_connector_state *conn_state)
+gen11_dsi_pre_pll_enable(struct intel_encoder *encoder,
+			 const struct intel_crtc_state *pipe_config,
+			 const struct drm_connector_state *conn_state)
 {
 	/* step2: enable IO power */
 	gen11_dsi_enable_io_power(encoder);
 
-	/* step3: enable DSI PLL */
+	/*
+	 * step3: DSI uses DPLL, can use the respective pll
+	 * manager enable func, just program esc clock here.
+	 */
 	gen11_dsi_program_esc_clk_div(encoder);
+}
 
+static void __attribute__((unused))
+gen11_dsi_pre_enable(struct intel_encoder *encoder,
+		     const struct intel_crtc_state *pipe_config,
+		     const struct drm_connector_state *conn_state)
+{
 	/* step4: enable DSI port and DPHY */
 	gen11_dsi_enable_port_and_phy(encoder, pipe_config);