Message ID | 1540327255-25639-2-git-send-email-uma.shankar@intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | Add support for Gen 11 pipe color features | expand |
Op 23-10-18 om 22:40 schreef Uma Shankar: > Add the degamma and gamma lut sizes to gen11 capability > structure. > > Signed-off-by: Uma Shankar <uma.shankar@intel.com> > --- > drivers/gpu/drm/i915/i915_pci.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c > index 44e7459..3c18ea2 100644 > --- a/drivers/gpu/drm/i915/i915_pci.c > +++ b/drivers/gpu/drm/i915/i915_pci.c > @@ -603,7 +603,8 @@ > TRANSCODER_DSI0_OFFSET, TRANSCODER_DSI1_OFFSET}, \ > GEN(11), \ > .ddb_size = 2048, \ > - .has_logical_ring_elsq = 1 > + .has_logical_ring_elsq = 1, \ > + .color = { .degamma_lut_size = 33, .gamma_lut_size = 1024 } > > static const struct intel_device_info intel_icelake_11_info = { > GEN11_FEATURES, This patch should probably be after patch 3/3..
>-----Original Message----- >From: Maarten Lankhorst [mailto:maarten.lankhorst@linux.intel.com] >Sent: Wednesday, October 24, 2018 6:49 PM >To: Shankar, Uma <uma.shankar@intel.com>; intel-gfx@lists.freedesktop.org >Cc: Syrjala, Ville <ville.syrjala@intel.com>; Lankhorst, Maarten ><maarten.lankhorst@intel.com> >Subject: Re: [Intel-gfx] [PATCH 1/3] drm/i915/icl: Add degamma and gamma lut >size to gen11 caps > >Op 23-10-18 om 22:40 schreef Uma Shankar: >> Add the degamma and gamma lut sizes to gen11 capability structure. >> >> Signed-off-by: Uma Shankar <uma.shankar@intel.com> >> --- >> drivers/gpu/drm/i915/i915_pci.c | 3 ++- >> 1 file changed, 2 insertions(+), 1 deletion(-) >> >> diff --git a/drivers/gpu/drm/i915/i915_pci.c >> b/drivers/gpu/drm/i915/i915_pci.c index 44e7459..3c18ea2 100644 >> --- a/drivers/gpu/drm/i915/i915_pci.c >> +++ b/drivers/gpu/drm/i915/i915_pci.c >> @@ -603,7 +603,8 @@ >> TRANSCODER_DSI0_OFFSET, >TRANSCODER_DSI1_OFFSET}, \ >> GEN(11), \ >> .ddb_size = 2048, \ >> - .has_logical_ring_elsq = 1 >> + .has_logical_ring_elsq = 1, \ >> + .color = { .degamma_lut_size = 33, .gamma_lut_size = 1024 } >> >> static const struct intel_device_info intel_icelake_11_info = { >> GEN11_FEATURES, > >This patch should probably be after patch 3/3.. Ok, will change the order. Thank You !!! Regards, Uma Shankar
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c index 44e7459..3c18ea2 100644 --- a/drivers/gpu/drm/i915/i915_pci.c +++ b/drivers/gpu/drm/i915/i915_pci.c @@ -603,7 +603,8 @@ TRANSCODER_DSI0_OFFSET, TRANSCODER_DSI1_OFFSET}, \ GEN(11), \ .ddb_size = 2048, \ - .has_logical_ring_elsq = 1 + .has_logical_ring_elsq = 1, \ + .color = { .degamma_lut_size = 33, .gamma_lut_size = 1024 } static const struct intel_device_info intel_icelake_11_info = { GEN11_FEATURES,
Add the degamma and gamma lut sizes to gen11 capability structure. Signed-off-by: Uma Shankar <uma.shankar@intel.com> --- drivers/gpu/drm/i915/i915_pci.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)