diff mbox series

[v1,2/2] drm/i915/icl: Record the valid VDBoxes with SFC capability

Message ID 1540995854-9032-2-git-send-email-tomasz.lis@intel.com (mailing list archive)
State New, archived
Headers show
Series [v1,1/2] drm/i915/icl: Mind the SFC units when resetting VD or VEBox engines | expand

Commit Message

Lis, Tomasz Oct. 31, 2018, 2:24 p.m. UTC
From: Oscar Mateo <oscar.mateo@intel.com>

In Gen11, only even numbered "logical" VDBoxes are hooked up to an SFC
(Scaler & Format Converter) unit. We will use this information to decide
when the SFC units need to be reset.

BSpec: 20189

Signed-off-by: Tomasz Lis <tomasz.lis@intel.com>
Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Michel Thierry <michel.thierry@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/intel_device_info.c | 9 +++++++++
 drivers/gpu/drm/i915/intel_device_info.h | 3 +++
 2 files changed, 12 insertions(+)

Comments

Mika Kuoppala Nov. 1, 2018, 10:21 a.m. UTC | #1
Tomasz Lis <tomasz.lis@intel.com> writes:

> From: Oscar Mateo <oscar.mateo@intel.com>
>
> In Gen11, only even numbered "logical" VDBoxes are hooked up to an SFC
> (Scaler & Format Converter) unit. We will use this information to decide
> when the SFC units need to be reset.
>
> BSpec: 20189
>
> Signed-off-by: Tomasz Lis <tomasz.lis@intel.com>
> Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
> Signed-off-by: Michel Thierry <michel.thierry@intel.com>
> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Cc: Michel Thierry <michel.thierry@intel.com>
> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> ---
>  drivers/gpu/drm/i915/intel_device_info.c | 9 +++++++++
>  drivers/gpu/drm/i915/intel_device_info.h | 3 +++
>  2 files changed, 12 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
> index 89ed3a8..e2454a7 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.c
> +++ b/drivers/gpu/drm/i915/intel_device_info.c
> @@ -881,6 +881,7 @@ void intel_device_info_init_mmio(struct drm_i915_private *dev_priv)
>  {
>  	struct intel_device_info *info = mkwrite_device_info(dev_priv);
>  	u32 media_fuse;
> +	uint logical_vdbox = 0;
>  	unsigned int i;

we do not use uints.

unsigned int i, logical_vdbox = 0;

>  
>  	if (INTEL_GEN(dev_priv) < 11)
> @@ -900,7 +901,15 @@ void intel_device_info_init_mmio(struct drm_i915_private *dev_priv)
>  		if (!(BIT(i) & info->vdbox_enable)) {
>  			info->ring_mask &= ~ENGINE_MASK(_VCS(i));
>  			DRM_DEBUG_DRIVER("vcs%u fused off\n", i);
> +			continue;
>  		}


This becomes more readable with:

if (info->vdbox_enable & BIT(i)) {
} else {
}

Thanks,
-Mika

> +
> +		/*
> +		 * In Gen11, only even numbered logical VDBOXes are
> +		 * hooked up to an SFC (Scaler & Format Converter) unit.
> +		 */
> +		if (logical_vdbox++ % 2 == 0)
> +			info->vdbox_sfc_access |= BIT(i);
>  	}
>  
>  	DRM_DEBUG_DRIVER("vebox enable: %04x\n", info->vebox_enable);
> diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
> index b4c2c4e..1eda80f 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.h
> +++ b/drivers/gpu/drm/i915/intel_device_info.h
> @@ -189,6 +189,9 @@ struct intel_device_info {
>  	u8 vdbox_enable;
>  	u8 vebox_enable;
>  
> +	/* Media engine access to SFC per instance */
> +	u8 vdbox_sfc_access;
> +
>  	struct color_luts {
>  		u16 degamma_lut_size;
>  		u16 gamma_lut_size;
> -- 
> 2.7.4
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
index 89ed3a8..e2454a7 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -881,6 +881,7 @@  void intel_device_info_init_mmio(struct drm_i915_private *dev_priv)
 {
 	struct intel_device_info *info = mkwrite_device_info(dev_priv);
 	u32 media_fuse;
+	uint logical_vdbox = 0;
 	unsigned int i;
 
 	if (INTEL_GEN(dev_priv) < 11)
@@ -900,7 +901,15 @@  void intel_device_info_init_mmio(struct drm_i915_private *dev_priv)
 		if (!(BIT(i) & info->vdbox_enable)) {
 			info->ring_mask &= ~ENGINE_MASK(_VCS(i));
 			DRM_DEBUG_DRIVER("vcs%u fused off\n", i);
+			continue;
 		}
+
+		/*
+		 * In Gen11, only even numbered logical VDBOXes are
+		 * hooked up to an SFC (Scaler & Format Converter) unit.
+		 */
+		if (logical_vdbox++ % 2 == 0)
+			info->vdbox_sfc_access |= BIT(i);
 	}
 
 	DRM_DEBUG_DRIVER("vebox enable: %04x\n", info->vebox_enable);
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index b4c2c4e..1eda80f 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -189,6 +189,9 @@  struct intel_device_info {
 	u8 vdbox_enable;
 	u8 vebox_enable;
 
+	/* Media engine access to SFC per instance */
+	u8 vdbox_sfc_access;
+
 	struct color_luts {
 		u16 degamma_lut_size;
 		u16 gamma_lut_size;