| Message ID | 1543503103-882-4-git-send-email-uma.shankar@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add support for Gen 11 pipe color features | expand |
On Thu, Nov 29, 2018 at 08:21:43PM +0530, Uma Shankar wrote: > Add the degamma and gamma lut sizes to gen11 capability > structure. I'd add a comment to the commit message indicating that this doesn't account for the extended range gamma entries and that we'll wait to address those (probably with some kind of new segmented gamma ABI) in a future patch. Matt > > v2: Reorder the patch as per Maarten's suggestion. > > v3: Rebase > > Signed-off-by: Uma Shankar <uma.shankar@intel.com> > --- > drivers/gpu/drm/i915/i915_pci.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c > index 1b81d7c..94f455d 100644 > --- a/drivers/gpu/drm/i915/i915_pci.c > +++ b/drivers/gpu/drm/i915/i915_pci.c > @@ -624,7 +624,8 @@ > }, \ > GEN(11), \ > .ddb_size = 2048, \ > - .has_logical_ring_elsq = 1 > + .has_logical_ring_elsq = 1, \ > + .color = { .degamma_lut_size = 33, .gamma_lut_size = 1024 } > > static const struct intel_device_info intel_icelake_11_info = { > GEN11_FEATURES, > -- > 1.9.1 >
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c index 1b81d7c..94f455d 100644 --- a/drivers/gpu/drm/i915/i915_pci.c +++ b/drivers/gpu/drm/i915/i915_pci.c @@ -624,7 +624,8 @@ }, \ GEN(11), \ .ddb_size = 2048, \ - .has_logical_ring_elsq = 1 + .has_logical_ring_elsq = 1, \ + .color = { .degamma_lut_size = 33, .gamma_lut_size = 1024 } static const struct intel_device_info intel_icelake_11_info = { GEN11_FEATURES,
Add the degamma and gamma lut sizes to gen11 capability structure. v2: Reorder the patch as per Maarten's suggestion. v3: Rebase Signed-off-by: Uma Shankar <uma.shankar@intel.com> --- drivers/gpu/drm/i915/i915_pci.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)