From patchwork Wed Jan 27 17:05:09 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Li Peng X-Patchwork-Id: 75420 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by demeter.kernel.org (8.14.3/8.14.2) with ESMTP id o0R95DB3023042 for ; Wed, 27 Jan 2010 09:05:14 GMT Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id AF2769E7C1; Wed, 27 Jan 2010 01:05:13 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from fmsmga102.fm.intel.com (mga10.intel.com [192.55.52.92]) by gabe.freedesktop.org (Postfix) with ESMTP id 16C7A9E78B for ; Wed, 27 Jan 2010 01:05:11 -0800 (PST) Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga102.fm.intel.com with ESMTP; 27 Jan 2010 01:04:18 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.49,352,1262592000"; d="scan'208";a="767679347" Received: from unknown (HELO pli1.bj.intel.com) ([172.16.180.72]) by fmsmga001.fm.intel.com with ESMTP; 27 Jan 2010 01:05:08 -0800 Date: Thu, 28 Jan 2010 01:05:09 +0800 From: Li Peng To: intel-gfx@lists.freedesktop.org Message-ID: <20100127170508.GA1964@pli1.bj.intel.com> MIME-Version: 1.0 Content-Disposition: inline User-Agent: Mutt/1.5.20 (2009-08-17) Subject: [Intel-gfx] [PATCH] drm/i915: don't trigger ironlake vblank interrupt at irq install X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.9 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index e7472d8..fcd87ad 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -1022,14 +1022,13 @@ static int ironlake_irq_postinstall(struct drm_device *dev) { drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; /* enable kind of interrupts always enabled */ - u32 display_mask = DE_MASTER_IRQ_CONTROL | DE_GSE | DE_PCH_EVENT | - DE_PIPEA_VBLANK | DE_PIPEB_VBLANK; + u32 display_mask = DE_MASTER_IRQ_CONTROL | DE_GSE | DE_PCH_EVENT; u32 render_mask = GT_USER_INTERRUPT; u32 hotplug_mask = SDE_CRT_HOTPLUG | SDE_PORTB_HOTPLUG | SDE_PORTC_HOTPLUG | SDE_PORTD_HOTPLUG; dev_priv->irq_mask_reg = ~display_mask; - dev_priv->de_irq_enable_reg = display_mask; + dev_priv->de_irq_enable_reg = display_mask | DE_PIPEA_VBLANK | DE_PIPEB_VBLANK; /* should always can generate irq */ I915_WRITE(DEIIR, I915_READ(DEIIR));