From patchwork Thu May 21 18:34:39 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: jim.bride@linux.intel.com X-Patchwork-Id: 6458201 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 922D49F318 for ; Thu, 21 May 2015 18:31:19 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 922792051D for ; Thu, 21 May 2015 18:31:18 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 967B4204FF for ; Thu, 21 May 2015 18:31:17 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 823CD6E932; Thu, 21 May 2015 11:31:16 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by gabe.freedesktop.org (Postfix) with ESMTP id 7513F6E932 for ; Thu, 21 May 2015 11:31:15 -0700 (PDT) Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga103.fm.intel.com with ESMTP; 21 May 2015 11:31:15 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.13,470,1427785200"; d="scan'208";a="698484275" Received: from shiv.jf.intel.com ([10.7.198.100]) by orsmga001.jf.intel.com with ESMTP; 21 May 2015 11:31:15 -0700 Date: Thu, 21 May 2015 11:34:39 -0700 From: Jim Bride To: Jani Nikula Message-ID: <20150521183439.GA10101@shiv.jf.intel.com> References: <1432052010-13412-1-git-send-email-jim.bride@linux.intel.com> <555D13B9.7030004@gmail.com> <20150521082025.GS18908@intel.com> <87oalejfvr.fsf@intel.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <87oalejfvr.fsf@intel.com> User-Agent: Mutt/1.5.21 (2010-09-15) Cc: intel-gfx@lists.freedesktop.org Subject: Re: [Intel-gfx] [PATCH] drm/i915/hsw: Fix workaround for server AUX channel clock divisor X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On Thu, May 21, 2015 at 03:04:40PM +0300, Jani Nikula wrote: > On Thu, 21 May 2015, Ville Syrjälä wrote: > > On Wed, May 20, 2015 at 04:07:37PM -0700, Todd Previte wrote: > >> Hi Jim, > >> > >> I checked the BSpec as well and there's nothing indicating that these > >> two bits are mutually exclusive. They are both sticky though, and if the > >> loop times out 5 times, both _DONE and _TIMEOUT may very well be set. In > >> that case the current code would just exit and never bother to change > >> clock dividers. So I think your code here is valid. > > > > Shouldn't we we checking receive error as well then? > > In other words, > > > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c > index 7cf3fd43071a..179af62d803d 100644 > --- a/drivers/gpu/drm/i915/intel_dp.c > +++ b/drivers/gpu/drm/i915/intel_dp.c > @@ -893,10 +893,8 @@ intel_dp_aux_ch(struct intel_dp *intel_dp, > continue; > } > if (status & DP_AUX_CH_CTL_DONE) > - break; > + goto done; > } > - if (status & DP_AUX_CH_CTL_DONE) > - break; > } > > if ((status & DP_AUX_CH_CTL_DONE) == 0) { > @@ -921,7 +919,7 @@ intel_dp_aux_ch(struct intel_dp *intel_dp, > ret = -ETIMEDOUT; > goto out; > } > - > +done: > /* Unload any bytes sent back from the other side */ > recv_bytes = ((status & DP_AUX_CH_CTL_MESSAGE_SIZE_MASK) >> > DP_AUX_CH_CTL_MESSAGE_SIZE_SHIFT); This looks good, except I think we might want something more like: This way we actually set ret appropriately in the event of a receive error or a timeout. Thoughts? Jim > > > > > > > In fact looking at our code after the loop, it's expecting DONE to be > > set before it'll even report receive/timeout errors to the user as > > EIO/ETIMEDOUT, otherwise it'll just return EBUSY. > > > >> > >> The only thing you may want to do is capture some of the IRC discussion > >> though. In particular, whether or not this is really HSW-specific, how > >> this affects other platforms and and the additional delays incurred by > >> running through the loop again after changing AUX channel clock dividers > >> would be good information to put in there. That's probably more of a > >> bikeshed though. > >> > >> Reviewed-by: Todd Previte > >> > >> -T > >> > >> On 5/19/2015 9:13 AM, jim.bride@linux.intel.com wrote: > >> > From: Jim Bride > >> > > >> > According to the HSW b-spec we need to try clock divisors of 63 > >> > and 72, each 3 or more times, when attempting DP AUX channel > >> > communication on a server chipset. This actually wasn't happening > >> > due to a short-circuit that only checked the DP_AUX_CH_CTL_DONE bit > >> > in status rather than checking that the operation was done and > >> > that DP_AUX_CH_CTL_TIME_OUT_ERROR was not set. > >> > > >> > Signed-off-by: Jim Bride > >> > --- > >> > drivers/gpu/drm/i915/intel_dp.c | 3 ++- > >> > 1 file changed, 2 insertions(+), 1 deletion(-) > >> > > >> > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c > >> > index 0edc305..c01a3f9 100644 > >> > --- a/drivers/gpu/drm/i915/intel_dp.c > >> > +++ b/drivers/gpu/drm/i915/intel_dp.c > >> > @@ -895,7 +895,8 @@ intel_dp_aux_ch(struct intel_dp *intel_dp, > >> > if (status & DP_AUX_CH_CTL_DONE) > >> > break; > >> > } > >> > - if (status & DP_AUX_CH_CTL_DONE) > >> > + if ((status & DP_AUX_CH_CTL_DONE) && > >> > + !(status & DP_AUX_CH_CTL_TIME_OUT_ERROR)) > >> > break; > >> > } > >> > > >> > >> _______________________________________________ > >> Intel-gfx mailing list > >> Intel-gfx@lists.freedesktop.org > >> http://lists.freedesktop.org/mailman/listinfo/intel-gfx > > > > -- > > Ville Syrjälä > > Intel OTC > > _______________________________________________ > > Intel-gfx mailing list > > Intel-gfx@lists.freedesktop.org > > http://lists.freedesktop.org/mailman/listinfo/intel-gfx > > -- > Jani Nikula, Intel Open Source Technology Center > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 0edc305..89ab714 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -893,10 +893,8 @@ intel_dp_aux_ch(struct intel_dp *intel_dp, continue; } if (status & DP_AUX_CH_CTL_DONE) - break; + goto done;; } - if (status & DP_AUX_CH_CTL_DONE) - break; } if ((status & DP_AUX_CH_CTL_DONE) == 0) { @@ -905,6 +903,7 @@ intel_dp_aux_ch(struct intel_dp *intel_dp, goto out; } +done: /* Check for timeout or receive error. * Timeouts occur when the sink is not connected */