From patchwork Tue Jun 23 22:26:48 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Philipp Gesang X-Patchwork-Id: 6668551 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 3A7749F380 for ; Wed, 24 Jun 2015 15:04:44 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 4D8A220544 for ; Wed, 24 Jun 2015 15:04:43 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id EEFE7203E1 for ; Wed, 24 Jun 2015 15:04:41 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8C7D06E18B; Wed, 24 Jun 2015 08:04:41 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org X-Greylist: delayed 2035 seconds by postgrey-1.34 at gabe; Tue, 23 Jun 2015 16:00:55 PDT Received: from relay2.uni-heidelberg.de (relay2.uni-heidelberg.de [129.206.210.211]) by gabe.freedesktop.org (Postfix) with ESMTP id 1B5396EAC7 for ; Tue, 23 Jun 2015 16:00:54 -0700 (PDT) Received: from ix.urz.uni-heidelberg.de (cyrus-portal01.urz.uni-heidelberg.de [129.206.100.176]) by relay2.uni-heidelberg.de (8.13.8/8.13.8) with ESMTP id t5NMQp5W018822; Wed, 24 Jun 2015 00:26:52 +0200 Received: from extmail.urz.uni-heidelberg.de (extmail.urz.uni-heidelberg.de [129.206.100.140]) by ix.urz.uni-heidelberg.de (Postfix) with ESMTPS id C0E9820B6A64; Wed, 24 Jun 2015 00:26:51 +0200 (CEST) Received: from localhost (p57A0FE46.dip0.t-ipconnect.de [87.160.254.70]) (authenticated bits=0) by extmail.urz.uni-heidelberg.de (8.13.4/8.13.1) with ESMTP id t5NMQnAw028104 (version=TLSv1/SSLv3 cipher=AES128-SHA bits=128 verify=NO); Wed, 24 Jun 2015 00:26:51 +0200 Date: Wed, 24 Jun 2015 00:26:48 +0200 From: Philipp Gesang To: intel-gfx@lists.freedesktop.org Message-ID: <20150623222648.GD12335@acheron> MIME-Version: 1.0 X-Operating-System: Linux acheron 4.0.4-2-ARCH User-Agent: Mutt/1.5.23 (2014-03-12) X-Mailman-Approved-At: Wed, 24 Jun 2015 08:04:40 -0700 Cc: daniel.vetter@intel.com Subject: [Intel-gfx] [bisect] regression in suspend with i915 on 82852/855GM X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-5.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Hi, suspend/resume results in the backlight not coming back to life on my X40 laptop with an “Display controller: Intel Corporation 82852/855GM Integrated Graphics Device”. I bisected the issue. Apparently, commit b0cd324faed23d10d66ba6ade66579c681feef6f introduced the problem. Author: Jani Nikula Date: Wed Nov 12 16:25:43 2014 +0200 drm/i915: don't save/restore backlight hist ctl registers I can confirm that suspend works as expected with a 4.1 kernel if the lines to dump/undump the BLC_HIST_CTL register are reintroduced; see the attached patch. (According to a web search, the same issue seems to have arisen before in 2009, see [1].) Let me know if you’d like me to run further tests on that particular hardware. Best, Philipp [1] http://lists.freedesktop.org/archives/intel-gfx/2009-October/004490.html From 2f5f519dd77cdd27f5a88413d8125fb23f6e526f Mon Sep 17 00:00:00 2001 From: Philipp Gesang Date: Tue, 23 Jun 2015 23:37:28 +0200 Subject: [PATCH] drm/i915: save and restore BLC_HIST_CTL during suspend/resume This partially reverts b0cd324fae... Without considering the BLC_HIST_CTL register the backlight on an IBM X40 (855GM) remains dark after suspend/resume. Include its value again with the saved registers. Signed-off-by: Philipp Gesang --- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/i915_suspend.c | 2 ++ 2 files changed, 3 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 8ae6f7f..f68e0b5 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -925,6 +925,7 @@ struct i915_suspend_saved_registers { u32 savePP_OFF; u32 savePP_CONTROL; u32 savePP_DIVISOR; + u32 saveBLC_HIST_CTL; u32 saveFBC_CONTROL; u32 saveCACHE_MODE_0; u32 saveMI_ARB_STATE; diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c index cf67f82..f417744 100644 --- a/drivers/gpu/drm/i915/i915_suspend.c +++ b/drivers/gpu/drm/i915/i915_suspend.c @@ -54,6 +54,7 @@ static void i915_save_display(struct drm_device *dev) dev_priv->regfile.savePP_ON_DELAYS = I915_READ(PP_ON_DELAYS); dev_priv->regfile.savePP_OFF_DELAYS = I915_READ(PP_OFF_DELAYS); dev_priv->regfile.savePP_DIVISOR = I915_READ(PP_DIVISOR); + dev_priv->regfile.saveBLC_HIST_CTL = I915_READ(BLC_HIST_CTL); } /* save FBC interval */ @@ -89,6 +90,7 @@ static void i915_restore_display(struct drm_device *dev) I915_WRITE(PP_OFF_DELAYS, dev_priv->regfile.savePP_OFF_DELAYS); I915_WRITE(PP_DIVISOR, dev_priv->regfile.savePP_DIVISOR); I915_WRITE(PP_CONTROL, dev_priv->regfile.savePP_CONTROL); + I915_WRITE(BLC_HIST_CTL, dev_priv->regfile.saveBLC_HIST_CTL); } /* only restore FBC info on the platform that supports FBC*/ -- 2.4.2