| Message ID | 20170120155608.22154-1-michal.winiarski@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Fri, Jan 20, 2017 at 04:56:08PM +0100, Michał Winiarski wrote: > HuC firmware is mapped at GuC accessible range. Let's add an assert to > verify that. > > v2: Split from previous commit (Michał) > v3: Oops, hit send before compiling, s/huc_fw/huc->fw And now I've amended the wrong patch... Ah, please ignore this one while I resend the first one > Cc: Anusha Srivatsa <anusha.srivatsa@intel.com> > Cc: Arkadiusz Hiler <arkadiusz.hiler@intel.com> > Cc: Chris Wilson <chris@chris-wilson.co.uk> > Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> > Signed-off-by: Michał Winiarski <michal.winiarski@intel.com> > --- > drivers/gpu/drm/i915/intel_huc.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-)
On Fri, Jan 20, 2017 at 04:58:51PM +0100, Michał Winiarski wrote: > On Fri, Jan 20, 2017 at 04:56:08PM +0100, Michał Winiarski wrote: > > HuC firmware is mapped at GuC accessible range. Let's add an assert to > > verify that. > > > > v2: Split from previous commit (Michał) > > v3: Oops, hit send before compiling, s/huc_fw/huc->fw > > And now I've amended the wrong patch... > Ah, please ignore this one while I resend the first one At this point the poor CI bot is thoroughly confused... -Chris
diff --git a/drivers/gpu/drm/i915/intel_huc.c b/drivers/gpu/drm/i915/intel_huc.c index d1e65fa..c144609 100644 --- a/drivers/gpu/drm/i915/intel_huc.c +++ b/drivers/gpu/drm/i915/intel_huc.c @@ -299,7 +299,7 @@ void intel_guc_auth_huc(struct drm_i915_private *dev_priv) int ret; u32 data[2]; - if (huc_fw->load_status != INTEL_UC_FIRMWARE_SUCCESS) + if (huc->fw.load_status != INTEL_UC_FIRMWARE_SUCCESS) return; vma = i915_gem_object_ggtt_pin(huc->fw.obj, NULL, 0, 0, @@ -312,7 +312,7 @@ void intel_guc_auth_huc(struct drm_i915_private *dev_priv) /* Specify auth action and where public signature is. */ data[0] = INTEL_GUC_ACTION_AUTHENTICATE_HUC; - data[1] = i915_ggtt_offset(vma) + huc->fw.rsa_offset; + data[1] = guc_ggtt_offset(vma) + huc->fw.rsa_offset; ret = intel_guc_send(guc, data, ARRAY_SIZE(data)); if (ret) {
HuC firmware is mapped at GuC accessible range. Let's add an assert to verify that. v2: Split from previous commit (Michał) v3: Oops, hit send before compiling, s/huc_fw/huc->fw Cc: Anusha Srivatsa <anusha.srivatsa@intel.com> Cc: Arkadiusz Hiler <arkadiusz.hiler@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> Signed-off-by: Michał Winiarski <michal.winiarski@intel.com> --- drivers/gpu/drm/i915/intel_huc.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)