From patchwork Fri Feb 24 19:05:28 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michel Thierry X-Patchwork-Id: 9591027 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id A803B601AE for ; Fri, 24 Feb 2017 19:05:35 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 93DAC2892E for ; Fri, 24 Feb 2017 19:05:35 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8882C28930; Fri, 24 Feb 2017 19:05:35 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 4AF402892E for ; Fri, 24 Feb 2017 19:05:35 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 2DFAB6E1A9; Fri, 24 Feb 2017 19:05:33 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTPS id 493086E1A4 for ; Fri, 24 Feb 2017 19:05:31 +0000 (UTC) Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 24 Feb 2017 11:05:30 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.35,201,1484035200"; d="scan'208";a="69272884" Received: from relo-linux-11.sc.intel.com ([10.3.160.214]) by fmsmga005.fm.intel.com with ESMTP; 24 Feb 2017 11:05:30 -0800 From: Michel Thierry To: intel-gfx@lists.freedesktop.org Date: Fri, 24 Feb 2017 11:05:28 -0800 Message-Id: <20170224190530.31482-1-michel.thierry@intel.com> X-Mailer: git-send-email 2.11.0 Subject: [Intel-gfx] [PATCH 1/3] drm/i915: Capture dmc firmware information before reset X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP The firmware may change between the hang and cat /sys/class/drm/card0/error Cc: Chris Wilson Signed-off-by: Michel Thierry Reviewed-by: Michal Wajdeczko --- drivers/gpu/drm/i915/i915_drv.h | 4 ++++ drivers/gpu/drm/i915/i915_gpu_error.c | 22 ++++++++++++++++------ 2 files changed, 20 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index a74b87b1b5a9..3b0cff05f5f7 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -953,6 +953,10 @@ struct i915_gpu_state { u32 gab_ctl; u32 gfx_mode; + /* Firmware load state */ + u32 dmc_loaded; + u32 dmc_version; + u32 nfence; u64 fence[I915_MAX_NUM_FENCES]; struct intel_overlay_error_state *overlay; diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c index 2b1d15668192..ae6f0092b046 100644 --- a/drivers/gpu/drm/i915/i915_gpu_error.c +++ b/drivers/gpu/drm/i915/i915_gpu_error.c @@ -623,13 +623,10 @@ int i915_error_state_to_str(struct drm_i915_error_state_buf *m, err_printf(m, "IOMMU enabled?: %d\n", error->iommu); if (HAS_CSR(dev_priv)) { - struct intel_csr *csr = &dev_priv->csr; - - err_printf(m, "DMC loaded: %s\n", - yesno(csr->dmc_payload != NULL)); + err_printf(m, "DMC loaded: %s\n", yesno(error->dmc_loaded)); err_printf(m, "DMC fw version: %d.%d\n", - CSR_VERSION_MAJOR(csr->version), - CSR_VERSION_MINOR(csr->version)); + CSR_VERSION_MAJOR(error->dmc_version), + CSR_VERSION_MINOR(error->dmc_version)); } err_printf(m, "EIR: 0x%08x\n", error->eir); @@ -1585,6 +1582,18 @@ static void i915_capture_reg_state(struct drm_i915_private *dev_priv, error->pgtbl_er = I915_READ(PGTBL_ER); } +/* Capture all firmware related information. */ +static void i915_capture_fw_state(struct drm_i915_private *dev_priv, + struct i915_gpu_state *error) +{ + if (HAS_CSR(dev_priv)) { + struct intel_csr *csr = &dev_priv->csr; + + error->dmc_loaded = (csr->dmc_payload != NULL); + error->dmc_version = csr->version; + } +} + static void i915_error_capture_msg(struct drm_i915_private *dev_priv, struct i915_gpu_state *error, u32 engine_mask, @@ -1650,6 +1659,7 @@ static int capture(void *data) i915_capture_gen_state(error->i915, error); i915_capture_reg_state(error->i915, error); + i915_capture_fw_state(error->i915, error); i915_gem_record_fences(error->i915, error); i915_gem_record_rings(error->i915, error); i915_capture_active_buffers(error->i915, error);